参数资料
型号: MT9D011D00STC
元件分类: 图像传感器
英文描述: IMAGE SENSOR-CMOS, 15fps, 0.20-0.30V
封装: DIE
文件页数: 51/64页
文件大小: 1265K
代理商: MT9D011D00STC
PDF: 81516de4(master) 8159a774(ext)/Source: 81516da4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MT9D011__MI2010_E_2.fm - Rev. B 6/05 EN
55
2004 Micron Technology, Inc. All rights reserved.
MT9D011 - 1/3.2-Inch 2-Megapixel Digital Image Sensor
Feature Description
Preliminary
“Offset_gain” is determined by the 2-bit code from Reg0x5A[1:0], as shown in Table 12.
These step sizes are not exact; increasing the stage0 ADC gain from 2 to 4 decreases the
step size significance; decreasing the ADC VREFD increases the step size significance.
Recommended Gain Settings
The analog gain circuitry in the MT9D011 provides signal gains from 1 to 15.875.
By applying maximum analog and digital gain, it is possible to achieve a total gain of
128. It is not recommended to operate the sensor with such high gain since this may
introduce visible noise in the image. Digital gain should therefore be limited to a factor
of 2 in order to keep the total gain below 32x.
Output Enable Control
When the sensor is configured to operate in Default mode, the DOUT, FRAME_VALID,
LINE_VALID, PIXCLK, and flash outputs can be placed in a high-impedance state under
hardware or software control, as shown in Table 14.
The pin transition between driven and High-Z always occurs asynchronously. Output-
enable control is provided as a mechanism to allow multiple sensors to share a single set
of interface pins with a host controller.
Note:
There is no benefit in placing the pins in a High-Z while the sensor is in its low power
standby state. Therefore, in single-sensor applications that use the STANDBY pin to
enter and leave the standby state, programming Reg0x0D[6] = 1 is recommended.
Power-Saving Modes
The sensor can be placed in a low power standby state by either of these mechanisms:
Asserting STANDBY input pin (provided that Reg0x0D[7] = 0)
Table 12: Offset Gain
Reg0x5A[1:0]
Offset_Gain
00
OFFSET_GAIN = 0 (no calibration voltage is applied)
01
OFFSET_GAIN = 0.25 (1 calibration LSB is equal to 0.5 ADC LSB when VREFD =
1V)
10
OFFSET_GAIN = 0.50 (1 calibration LSB is equal to 1 ADC LSB when VREFD =
1V)
11
OFFSET_GAIN = 1 (1 calibration LSB is equal to 2 ADC LSB when VREFD = 1V)
Table 13: Recommended Gain Settings
Desired Gain
Recommended Gain Register Setting
1–1.969
0x020–0x03F
2–7.938
0x0A0–0x0FF
8–15.875
0x1C0–0x1FF
Table 14: Output Enable Control
Standby
Reg0x0D[4] (output_dis)
Reg0x0D[6] (drive_pins)
Pin State
0
0 (default)
Driven
1
0 (default)
High-Z
don’t care
0 (default)
1
Driven
don’t care
1
don’t care
High-Z
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