参数资料
| 型号： | NCP1034DR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 19/23页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 16-SOIC |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 1 |
| 频率 - 最大： | 500kHz |
| 占空比： | 80% |
| 电源电压： | 10 V ~ 18 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 16-SOIC（0.154"，3.90mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 1118 (CN2011-ZH PDF) |
| 其它名称： | NCP1034DR2GOSDKR |
NCP1034
The input capacitor, MOSFETs, inductor and output
capacitor should be placed as close as possible to one
another. This is suitable to reduce EMI and to minimize VS
overshoots. Connecting the signal and power ground at one
point near the output connector improves load regulation.
Connection between the source pin of the low side MOSFET
and the IC should be very short with wide traces and
optimally using two layers to achieve minimum inductance
between them.
The blocking and bootstrap capacitors should be placed as
close as possible to the IC. The feedback and compensation
network should be close to the IC to minimize noise.
TYPICAL APPLICATION
X1 ? 1
R11A
10k
R11B
R11C
R11D
R11E
10k
10k
10k
10k
D2 C10
100n
GND GND
C2
100n
D1
1N4148
C4
C1A
2u2
C1B
2u2
X1 ? 2
MMSZ4699
8
9
100n
GND
C3
100n
12
VCC
DRVVCC VB
HDRV
10
Q2
NTD3055
5
SYNC
VS
11
L1
X2 ? 2
R4
110k
GND
15
4
16
RT
SS/SD
UVLO
OCIN
LDRV
PGND
13
7
6
R8
10k
13 m
Q3
NTD24N06
C9
47 m
C9B
47 m
C9C
47 m
R1
16k9
R9
1k2
1
14
OCSET
GND
FB
COMP
2
3
C8
1n8
R5
3k9
R10 C5
10k 220n
R6
20k
R7
10k
IC1
NCP1034SMD
R3
4k7
C6
12n
R15
0R
R2
5k6
X2 ? 1
C7
GND
GND GND GND
GND
GND
330p
GND
Figure 33. Single Output Buck Converter from 38 V ? 58 V to 5 V/5 A @ 200 kHz
90
85
80
75
70
65
60
55
38 V
48 V
V IN = 58 V
50
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
I OUT (A)
Figure 34. Efficiency and Power Loss of Circuit at Figure 33
http://onsemi.com
19
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