参数资料
型号: NCP1252BDR2G
厂商: ON Semiconductor
文件页数: 11/18页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO PWM 8SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 500kHz
占空比: 84%
电源电压: 9 V ~ 28 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -25°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
NCP1252
FB level
V FBOL = 6.0 V
Normal Operation:
DC min < DC < DC maxA/B/C
V f = 0.75 V
V skip = 0.3 V
Operation @ T on_min
DC = DC min
Skip: DC = 0%
Figure 29. Mode of Operation versus the FB Pin Level
Time
Startup Sequence:
The startup sequence is activated when Vcc pin reaches
V CC(on) level. Once the startup sequence has been activated
the internal delay timer (SS delay ) runs. Only when the
internal delay elapses the soft start can be allowed if the BO
pin level is above V BO level. If the BO pin threshold is
reached or as soon as this level will be reached the soft start
V CC pin
V CC(on)
is allowed. When the soft start is allowed the SS pin is
released from the ground and the current source connected
to this pin sources its current to the external capacitor
connected on SS pin. The voltage variation of the SS pin
divided by 4 gives the same peak current variation on the CS
pin.
The following figures illustrate the different startup cases.
V CC pin
V CC(on)
BO pin
V BO
SS pin
120 ms: Internal
delay
Time
Time
BO pin
V BO
SS pin
120 ms: Internal
delay
Time
Time
DRV pin
Soft start
Time
DRV pin
Soft start
Time
No
pulse
CASE #1
Time
CASE #2
Time
Figure 30. Different Startup Sequence Case #1 & #2
With the Case #1, when the V CC pin reaches the V CC(on)
level, the internal timer starts. As the BO pin level is above
the V BO threshold at the end of the internal delay, a soft start
sequence is started.
With the Case #2, at the end of the internal delay, the BO
pin level is below the V BO threshold thus the soft start
sequence can not start. A new soft start sequence will start
only when the BO pin reaches the V BO threshold.
http://onsemi.com
11
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