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| 型号： | NCP1252BDR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 15/18页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR FLYBK ISO PWM 8SOIC |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 500kHz |
| 占空比： | 84% |
| 电源电压： | 9 V ~ 28 V |
| 降压： | 无 |
| 升压： | 无 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -25°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
NCP1252
Vdd
FB
2R
Clock
R
Buffered
Ramp
S
R
Q
Q
DRV
path
Rramp
Rcomp
Rsense
CS
Ccs
LEB
Figure 36. Ramp Compensation Setup
S int + F
DC max SW
(V out ) V f ) N s
L out
S sense + R sense (eq. 7)
R comp + R ramp
Ratio
1 * Ratio
R sense d comp
S int
S natural +
V bulk
L mag sense
S natural
d natural_comp +
S sense
In the NCP1252, the internal ramp swings with a slope of:
V ramp
(eq. 6)
In a forward application the secondary ? side downslope
viewed on a primary side requires a projection over the sense
resistor R sense . Thus:
N p
where:
? V out is output voltage level
? V f the freewheel diode forward drop
? L out , the secondary inductor value
? N s /N p the transformer turn ratio
? R sense : the sense resistor on the primary side
Assuming the selected amount of ramp compensation to
be applied is δ comp , then we must calculate the division ratio
to scale down S int accordingly:
Ratio + (eq. 8)
Thus the new division ratio is:
A few line of algebra determined Rcomp:
(eq. 9)
The previous ramp compensation calculation does not
take into account the natural primary ramp created by the
transformer magnetizing inductance. In some case
illustrated here after the power supply does not need
additional ramp compensation due to the high level of the
natural primary ramp.
The natural primary ramp is extracted from the following
formula:
R (eq. 10)
Then the natural ramp compensation will be:
(eq. 11)
If the natural ramp compensation ( δ natural_comp ) is higher
than the ramp compensation needed ( δ comp ), the power
supply does not need additional ramp compensation. If not,
only the difference ( δ comp ? δ natural_comp ) should be used to
calculate the accurate compensation value.
if d natural_comp t d comp ? Ratio +
S sense ( d comp * d natural_comp )
S int
(eq. 12)
Then R comp can be calculated with the same equation used
when the natural ramp is neglected (Equation 9).
Ramp Compensation Design Example:
2 switch ? Forward Power supply specification:
? Regulated output: 12 V
? L out = 27 m H
? V f = 0.7 V (drop voltage on the regulated output)
? Current sense resistor : 0.75 W
? Switching frequency : 125 kHz
? V bulk = 350 V, minimum input voltage at which the
power supply works.
? Duty cycle max: DC max = 84%
? V ramp = 3.5 V, Internal ramp level.
? R ramp = 26.5 k W , Internal pull ? up resistance
? Targeted ramp compensation level: 100%
? Transformer specification:
? L mag = 13 mH
? N s /N p = 0.085
http://onsemi.com
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