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参数资料
| 型号： | NCP1380BGEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 20/26页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL NCP1380B 19V QR CTLR |
| 设计资源： | NCP1380BGEVB Schematic NCP1380BGEVB Gerber Files NCP1380BGEVB BOM |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | NCP1380BGEVBOS |
NCP1380
SHORT?CIRCUIT OR OVERLOAD MODE
Figure 37 shows the implementation of the fault timer.
S
R
Q
Q
DRV
Vd d
V CC
au x
VCC
management
latch
VC C sto p
fau l t
grand
CS
CsStop
reset
LEB1
+
PW Mr eset
R sen se
ZCD/OPP
FB/4
OPP
V IL IM IT
Soft?start
?
+
?
IpFlag
SS en d
Soft ?s t art end ?
t hen 1
Down
Up TIMER
Reset
A&C:
Latched
S
Q
Laux
LEB2
+
else 0
CsStop
Q
V CS(stop)
?
grand
reset
R
Figure 37. Overload Detection Schematic
When the current in the MOSFET is higher than V ILIM /
R sense , “Max Ip” comparator trips and the digital timer starts
counting: the timer count is incremented each 10 ms. When
the current comes back within safe limits, “Max Ip”
comparator becomes silent and the timer count down: the
timer count is decremented each 10 ms. In normal overload
conditions the timer reaches its completion when it has
counted up 8 times 10 ms.
On B and D version, when the timers reaches its
completion, the circuit enter auto?recovery mode: the
circuit stops all operations and V CC decreases via the circuit
own consumption (I CC1 ). When V CC reaches V CC(off) , the
On A and C versions, when the timers finishes counting
80 ms, the circuit goes in latch mode (Figure 39): the DRV
pulses stop and V CC is pulled down to V CC(latch) which is
7.2 V typically. The circuit un?latches when the current
circulating in V CC pin drops below I CC(latch) .
In parallel to the cycle?by?cycle sensing of the CS pin,
another comparator with a reduced LEB (t BCS ) and a
threshold of 1.2 V is able to sense winding short?circuit and
immediately shut down the controller. Depending on the
version, this additional protection is either latched or
auto?recovery, according to the overload protection
behavior.
circuit goes in startup mode and restart switching. (see
Figure 38) This ensures a low duty?cycle burst operation in
fault mode.
http://onsemi.com
20
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