参数资料
型号: NCP1380BGEVB
厂商: ON Semiconductor
文件页数: 6/26页
文件大小: 0K
描述: BOARD EVAL NCP1380B 19V QR CTLR
设计资源: NCP1380BGEVB Schematic
NCP1380BGEVB Gerber Files
NCP1380BGEVB BOM
标准包装: 1
系列: *
其它名称: NCP1380BGEVBOS
NCP1380
MAXIMUM RATINGS
Symbol
V CC(MAX)
I CC(MAX)
V DRV(MAX)
I DRV(MAX)
V MAX
I MAX
I ZCD(MAX)
R q JA
T J(MAX)
Rating
Maximum Power Supply voltage, V CC pin, continuous voltage
Maximum current for V CC pin
Maximum driver pin voltage, DRV pin, continuous voltage
Maximum current for DRV pin
Maximum voltage on low power pins (except pins DRV and V CC )
Current range for low power pins (except pins ZCD, DRV and V CC )
Maximum current for ZCD pin
Thermal Resistance Junction?to?Air
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
ESD Capability, HBM Model (Note 1)
ESD Capability, MM Model (Note 1)
ESD Capability, CDM Model (Note 1)
Value
?0.3 to 28
± 30
?0.3 to 20
± 1000
?0.3 to 10
± 10
+3 / ?2
120
150
?40 to +125
?60 to +150
4
200
2
Unit
V
mA
V
mA
V
mA
mA
° C/W
° C
° C
° C
kV
V
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model 4000 V per JEDEC Standard JESD22, Method A114E
Machine Model 200 V per JEDEC Standard JESD22, Method A115A
Charged Device Model 2000 V per JEDEC Standard JESD22?C101D.
2. This device contains latchup protection and exceeds 100 mA per JEDEC Standard JESD78.
ELECTRICAL CHARACTERISTICS (Unless otherwise noted: For typical values T J = 25 ° C, V CC = 12 V, V ZCD = 0 V,
V FB = 3 V, V CS = 0 V, V fault = 1.5 V, C T = 680 pF) For min/max values T J = ?40 ° C to +125 ° C, Max T J = 150 ° C, V CC = 12 V)
Symbol
Condition
Min
Typ
Max
Unit
SUPPLY SECTION ? STARTUP AND SUPPLY CIRCUITS
Supply Voltage
V
V CC(on)
V CC(off)
V CC(HYS)
V CC(latch)
V CC(reset)
Startup Threshold
Minimum Operating Voltage
Hysteresis V CC(on) ? V CC(off)
Clamped V CC when latched?off
Internal logic reset
V CC increasing
V CC decreasing
V CC decreasing, I CC = 30 m A
16
8.3
7.2
6.2
6
17
9
8.0
7.2
7
18
9.4
9.2
8.2
8
t VCC(off)
t VCC(reset)
V CC(off) noise filter
V CC(reset) noise filter
?
?
5
20
?
?
m s
I CC(start)
Startup current
FB pin open
?
10
20
m A
V CC = V CC(on) ? 0.5 V
I CC(disch)
Current that discharges V CC when the controller
V CC = 12 V
3.0
4.0
5.0
mA
gets latched
I CC(latch)
Current into V CC that keeps the controller latched
V CC = V CC(latch)
30
?
?
m A
(Note 3)
Supply Current
mA
I CC1
I CC2
I CC3A
I CC3B
Device Disabled/Fault (Note 3) B, C, and D only
Device Enabled/No output load on pin 5
Device Switching (F SW = 65 kHz)
Device Switching VCO mode
V CC > V CC(off)
F sw = 10 kHz
C DRV = 1 nF, F SW = 65 kHz
C DRV = 1 nF, V FB = 1.25 V
?
?
?
?
1.7
1.7
2.65
2.0
2.0
2.0
3.0
?
CURRENT COMPARATOR ? CURRENT SENSE
V ILIM
t LEB
I bias
t ILIM
I peak(VCO)
Current Sense Voltage Threshold
Leading Edge Blanking Duration for V ILIM
Input Bias Current (Note 3)
Propagation Delay
Percentage of maximum peak current level at
V FB = 4 V, V CS increasing
Minimum on time minus t ILIM
DRV high
V CS > V ILIM to DRV turn?off
V FB = 0.4 V, V CS increasing
0.76
210
?2
?
15.4
0.8
275
?
125
17.5
0.84
330
2
175
19.6
V
ns
m A
ns
%
which VCO takes over (Note 4)
http://onsemi.com
6
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