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参数资料
| 型号： | NCP1380BGEVB |
| 厂商： | ON Semiconductor |
| 文件页数： | 23/26页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL NCP1380B 19V QR CTLR |
| 设计资源： | NCP1380BGEVB Schematic NCP1380BGEVB Gerber Files NCP1380BGEVB BOM |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | NCP1380BGEVBOS |
NCP1380
OVERVOLTAGE/OVERTEMPERATURE DETECTION (A AND B VERSIONS)
Overvoltage and overtemperature detection is achieved
by reading the voltage on pin 7 (See Figure 41).
VCC
VDD
V OVP
nois e de lay
Dz
I OTP(REF)
Fa ult
7
OVPcomp
S
Q
Latch
NTC
Rc l a mp
Vclam p
V OTP
nois e de lay
OT Pc o mp
SS end
Figure 41. OVP/OTP Circuitry
grand
reset
R
Q
The I OTP(REF) current (91 m A typ.) biases the Negative
Temperature Coefficient sensor (NTC), naturally imposing
a dc voltage on the OTP pin. An internal clamp limit the
pin 7 voltage to 1.2 V when the NTC resistance is high (For
example, at 25 ° C, R NTC > 100 k W ). When the temperature
increases, the NTC’s resistance reduces bringing the pin 7
voltage down until it reaches a typical value of 0.8 V: the
comparator trips and latches?off the controller (see
Figure 42).
In case of overvoltage, the zener diode starts to conduct
and inject current inside the internal clamp resistor R clamp
thus causing the pin 7 voltage to increase. When this voltage
reaches the OVP threshold (2.5 V typ), the controller is
latched?off: all the DRV pulses stops and V CC is
pulled?down to V CC(latch) (7.2 V typ). The circuit
un?latches when the current circulating in V CC pin drops
below I CC(latch) , thus the user must unplug and replug the
power supply.
Figure 42. Overvoltage and Overtemperature Chronograms
http://onsemi.com
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