参数资料
型号: NCP1653DR2
厂商: ON Semiconductor
文件页数: 14/19页
文件大小: 0K
描述: IC CTRLR PFC CURRENT MODE 8SOIC
产品变化通告: LTB Notification 03/Jan/2008
标准包装: 1
模式: 连续导电(CCM)
频率 - 开关: 90kHz ~ 110kHz
电源电压: 8.75 V ~ 18 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 剪切带 (CT)
其它名称: NCP1653DR2OSCT
NCP1653, NCP1653A
calculation to always be the peak of the sinusoidal voltage
due to very little current consumption (i.e., V in = √ 2 V ac and
I vac ≈ 0). This I vac current represents the RMS input voltage
V ac and will be used in overpower limitation (OPL) and the
PFC duty modulation.
limited. The OPL is automatically deactivated when the
product (I S × I vac ) becomes lower than the 3 nA 2 level. This
3 nA 2 level corresponds to the approximated input power
(I L × V ac ) to be smaller than the particular expression in
(eq.20).
IL @ CS
Vac @
V in
Current
Mirror
R
RS
IS Ivac t 3 nA2
2
Rvac ) 12 k W
t 3 nA2
Rvac
Ivac
In
3
12 k
4V
IL @ Vac t
RS Rvac ) 12 k W
RCS 2
3 nA2
(eq.20)
Cvac
9V
Biasing the Controller
It is recommended to add a typical 1 nF to 100 nF
Figure 37. Input Voltage Sensing
There is an internal 9 V ESD Zener Diode on the pin.
Hence, the value of R vac is recommended to be at least
938 k W for possibly up to 400 V instantaneous input voltage.
decoupling capacitor next to the V CC pin for proper operation.
When the NCP1653 operates in follower boost mode, the PFC
output voltage is not always regulated at a particular level
under all application range of input voltage and load power.
It is not recommended to make a low ? voltage bias supply
voltage by adding an auxiliary winding on the PFC boost
Rvac
9 V * 4 V
400 V * 9 V
12 k W
u
Rvac u 938 k W
Overpower Limitation (OPL)
(eq.19)
inductor. Alternatively, it is recommended to get the V CC
biasing supply from the second ? stage power conversion stage
as shown in Figure 39.
V bulk
Sense current I S represents the inductor current I L and
hence represents the input current approximately.
Input ? voltage current I vac represents the RMS input
voltage V ac and hence represents the input voltage. Their
product (I S × I vac ) represents an approximated input power
(I L × V ac ).
AC EMI
Input Filter
V cc
Output
Voltage
V reg
300 k
2
Vcontrol
NCP1653
Second ? stage
Power Converter
96% I ref I ref I FB
Regulation Block
0
1
Figure 39. Recommended Biasing Scheme in
Follower Boost Mode
When the NCP1653 operates in constant output voltage
Overpower
Limitation
Figure 38. Overpower Limitation Reduces V control
When the product (I S × I vac ) is greater than a permissible
level 3 nA 2 , the output V reg of the regulation block is pulled
to 0 V. It makes V control to be 0 V indirectly and V M is
pulled to be its maximum. It generates the minimum duty
ratio or no duty ratio eventually so that the input power is
mode, it is possible to make a low ? voltage bias supply by
adding an auxiliary winding on the PFC boost inductor in
Figure 40. In PFC boost circuit, the input is the rectified AC
voltage and it is non ? constant versus time that makes the
auxiliary winding voltage also non ? constant. Hence, the
configuration in Figure 40 charges the voltages in
capacitors C1 and C2 to n × (V out ? V in ) and n × V in and n is
the turn ratio. As a result, the stack of the voltages is n × V out
that is constant and can be used as a biasing voltage.
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