参数资料
| 型号： | NCP5220MNR2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/18页 |
| 文件大小： | 0K |
| 描述： | IC CTLR PWM DUAL BUCK PWR 20-DFN |
| 产品变化通告： | Product Obsolescence 24/Jan/2011 |
| 标准包装： | 1 |
| 应用： | 控制器，DDR |
| 输入电压： | 5 V ~ 12 V |
| 输出数： | 2 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-VFDFN 裸露焊盘 |
| 供应商设备封装： | 20-QFN（6x5） |
| 包装： | 剪切带 (CT) |
| 其它名称： | NCP5220MNR2GOSCT |
NCP5220
PIN DESCRIPTION
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Symbol
COMP
FBDDQ
SS
PGND
VTT
VDDQ
AGND
FBVTT
SLP_S5
FB1P5
GND_1P5
BG_1P5
TG_1P5
SLP_S3
COMP_1P5
5VDUAL
BOOT
TG_DDQ
BG_DDQ
SW_DDQ
TH_PAD
Description
VDDQ error amplifier compensation node.
DDQ regulator feedback pin.
Soft?start pin of DDQ and MCH.
Power ground.
VTT regulator output.
Power input for VTT linear regulator.
Analog ground connection and remote ground sense.
VTT regulator pin for closed loop regulation.
Active LOW control signal to activate S5 Power OFF State.
V1P5 switching regulator feedback pin.
Power ground for V1P5 regulator.
Gate driver output for V1P5 regulator low side N?Channel Power FET.
Gate driver output for V1P5 regulator high side N?Channel Power FET.
Active LOW control signal to activate S3 sleep state.
V1P5 error amplifier compensation node.
5.0 V dual supply input, which is monitored by undervoltage lock out circuitry.
Gate driver input supply, which is monitored by undervoltage lock out circuitry, and a boost capacitor
connection between SWDDQ and this pin.
Gate driver output for DDQ regulator high side N?Channel Power FET.
Gate driver output for DDQ regulator low side N?Channel Power FET.
DDQ regulator switch node and current limit sense input.
Copper pad on bottom of IC used for heatsinking. This pin should be connected to the ground plane under
the IC.
MAXIMUM RATINGS
Rating
Power Supply Voltage (Pin 16) to AGND (Pin 7)
BOOT (Pin 17) to AGND (Pin 7)
Gate Drive (Pins 12, 13, 18, 19) to AGND (Pin 7)
Input / Output Pins to AGND (Pin 7)
Pins 1?3, 5, 6, 8?10, 14?15, 20
PGND (Pin 4), GND_1P5 (Pin 11) to AGND (Pin 7)
Symbol
5VDUAL
BOOT
Vg
V IO
V GND
Value
?0.3, 6.0
?0.3, 14
?0.3 DC,
?4.0 for t 100 ns; 14
?0.3, 6.0
?0.3, 0.3
Unit
V
V
V
V
V
Thermal Characteristics
DFN?20 Plastic Package
R q JA
35
° C/W
Thermal Resistance Junction?to?Air
Operating Junction Temperature Range
Operating Ambient Temperature Range
Storage Temperature Range
Moisture Sensitivity Level
T J
T A
T stg
MSL
0 to + 150
0 to + 70
? 55 to +150
2.0
° C
° C
° C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. This device series contains ESD protection and exceeds the following tests: Human Body Model (HBM) " 2.0 kV per JEDEC standard:
JESD22–A114. Machine Model (MM) " 200 V per JEDEC standard: JESD22–A115.
2. Latchup Current Maximum Rating: " 150 mA per JEDEC standard: JESD78.
http://onsemi.com
4
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