参数资料
型号: NCP5322ADW
厂商: ON Semiconductor
文件页数: 15/31页
文件大小: 0K
描述: IC CTLR BUCK 2PH DRVR/DAC 28SOIC
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 26
应用: 控制器,高性能处理器
输入电压: 4.5 V ~ 14 V
输出数: 2
输出电压: 3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC
包装: 管件
NCP5322A
Current Sense Amplifier (CSA) input mismatch and the
value of the current sense component will determine the
accuracy of the current sharing between phases. The worst
case Current Sense Amplifier input mismatch is ± 5.0 mV
and will typically be within 3.0 mV. The difference in peak
currents between phases will be the CSA input mismatch
divided by the current sense resistance. If all current sense
components are of equal resistance a 3.0 mV mismatch with
a 2.0 m W sense resistance will produce a 1.5 A difference in
current between phases.
External Ramp Size and Current Sensing
The internal ramp allows flexibility of current sense time
constant. Typically, the current sense R CSn ? C CSn time
constant (n = 1 or 2) should be equal to or slower than the
inductor ’s time constant. If RC is chosen to be smaller
(faster) than L/R L , the AC or transient portion of the current
sensing signal will be scaled larger than the DC portion. This
will provide a larger steady state ramp, but circuit
performance will be affected and must be evaluated
carefully. The current signal will overshoot during transients
and settle at the rate determined by R CSn ? C CSn . It will
eventually settle to the correct DC level, but the error will
decay with the time constant of R CSn ? C CSn . If this error is
excessive it will effect transient response, adaptive
positioning and current limit. During a positive current
transient, the COMP pin will be required to undershoot in
response to the current signal in order to maintain the output
voltage. Similarly, the V DRP signal will overshoot which
will produce too much transient droop in the output voltage.
Single phase overcurrent will trip earlier than it would if
compensated correctly and hiccup mode current limit will
have a lower threshold for fast rise step loads than for slowly
rising output currents.
The waveforms in Figure 13 show a simulation of the
current sense signal and the actual inductor current during a
positive step in load current with values of L = 500 nH, R L
= 1.6 m W , R CSn = 20 k and C CSn = 0.01 m F. For ideal current
signal compensation the value of R CSn should be 31 k W . Due
to the faster than ideal RC time constant there is an overshoot
of 50% and the overshoot decays with a 200 m s time
constant. With this compensation the I LIM pin threshold
must be set more than 50% above the full load current to
avoid triggering hiccup mode during a large output load
step.
Figure 13. Inductive Sensing Waveform During a
Load Step with Fast RC Time Constant (50 m s/div)
Current Limit
Two levels of overcurrent protection are provided. First,
if the voltage on the Current Sense pins (either CS1 or CS2)
exceeds CS REF by more than a fixed threshold (Single Pulse
Current Limit), the PWM comparator is turned off. This
provides fast peak current protection for individual phases.
Second, the individual phase currents are summed and
low?pass filtered to compare an averaged current signal to
a user adjustable voltage on the I LIM pin. If the I LIM voltage
is exceeded, the fault latch trips and the Soft Start capacitor
is discharged until the Soft?Start pin reaches 0.27 V. Then
Soft Start begins. The converter will continue to operate in
a low current hiccup mode until the fault condition is
corrected.
Overvoltage Protection
Overvoltage protection (OVP) is provided as a result of
the normal operation of the Enhanced V 2 control topology
with synchronous rectifiers. The control loop responds to an
overvoltage condition within 400 ns, causing the top
MOSFET to shut OFF and the synchronous (lower)
MOSFET to turn ON. This results in a “crowbar” action to
clamp the output voltage and prevent damage to the load.
The regulator will remain in this state until the overvoltage
condition ceases or the input voltage is pulled low.
Transient Response and Adaptive Positioning
For applications with fast transient currents the output filter
is frequently sized larger than ripple currents require in order
to reduce voltage excursions during load transients. Adaptive
voltage positioning can reduce peak?to?peak output voltage
deviations during load transients and allow for a smaller
output filter. The output voltage can be set higher than
nominal at light loads to reduce output voltage sag when the
load current is applied. Similarly, the output voltage can be set
lower than nominal during heavy loads to reduce overshoot
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