参数资料
型号: NCP5322ADW
厂商: ON Semiconductor
文件页数: 24/31页
文件大小: 0K
描述: IC CTLR BUCK 2PH DRVR/DAC 28SOIC
产品变化通告: Product Obsolescence 11/Feb/2009
标准包装: 26
应用: 控制器,高性能处理器
输入电压: 4.5 V ~ 14 V
输出数: 2
输出电压: 3.3V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
供应商设备封装: 28-SOIC
包装: 管件
NCP5322A
For resistive current sensing, choose the current sense
network (R CSn , C CSn , n = 1 or 2) to satisfy
RCSn @ CCSn + Lo (Rsense)
(33)
This will provide an adequate starting point for R CSn and
C CSn . After the converter is constructed, the value of R CSn
(and/or C CSn ) should be fine?tuned in the lab by observing
the V DRP signal during a step change in load current. The
R CSn ? C CSn network should be tuned to provide a
“square?wave” at the V DRP output pin with maximum rise
time and minimal overshoot as shown in Figure 22.
Equation 32 will be most accurate for better iron powder
core material (such as the ?8 from Micrometals). This
material is very consistent with DC current and frequency.
Figure 22. V DRP Tuning Waveforms. The RC Time
Constant of the Current Sense Network Is Optimal:
V DRP and V OUT Respond to the Load Current Quickly
Without Overshooting.
Less expensive core materials (such as the ?52 from
Micrometals) change their characteristics with DC current,
AC flux density, and frequency. This material will yield
acceptable converter performance if the current sense time
constant is set lower (longer) than anticipated. As a rule of
thumb, use approximately twice the resistance (R CSn ) or
twice the capacitance (C CSn ) when using the less expensive
core material.
8. Error Amplifier Tuning
After the steady?state (static) AVP has been set and the
current sense network has been optimized the Error
Amplifier must be tuned. Basically, the gain of the Error
Amplifier should be adjusted to provide an acceptable
transient response by increasing or decreasing the Error
Amplifier ’s feedback capacitor (C AMP in the Applications
Diagram). The bandwidth of the control loop will vary
directly with the gain of the error amplifier.
Figure 23. The Value of C AMP Is Too High and the
Loop Gain/Bandwidth Too Low. COMP Slews Too
Slowly Which Results in Overshoot in V OUT .
If C AMP is too large the loop gain/bandwidth will be low,
the COMP pin will slew too slowly, and the output voltage
will overshoot as shown in Figure 23. On the other hand, if
C AMP is too small the loop gain/bandwidth will be high, the
COMP pin will slew very quickly and overshoot. Integrator
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