参数资料
| 型号： | NCP5322ADW |
| 厂商： | ON Semiconductor |
| 文件页数： | 19/31页 |
| 文件大小： | 0K |
| 描述： | IC CTLR BUCK 2PH DRVR/DAC 28SOIC |
| 产品变化通告： | Product Obsolescence 11/Feb/2009 |
| 标准包装： | 26 |
| 应用： | 控制器，高性能处理器 |
| 输入电压： | 4.5 V ~ 14 V |
| 输出数： | 2 |
| 输出电压： | 3.3V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 28-SOIC |
| 包装： | 管件 |
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NCP5322A
This formula assumes steady?state conditions with no
more than one phase on at any time. The second term in
D I Lo is the peak?to?peak ripple current in the output
inductor of value Lo:
Equation 4 is the total ripple current seen by the output
capacitors. The total output ripple current is the “time
D ILo + (VIN * VOUT) @ D (Lo @ fSW)
(10)
summation” of the two individual phase currents that are
180 degrees out?of?phase. As the inductor current in one
For the two?phase converter, the input capacitor(s) RMS
current is then:
phase ramps upward, current in the other phase ramps
downward and provides a canceling of currents during part
ICIN,RMS + [2D @ (IC,MIN2 ) IC,MIN @ D IC,IN
(11)
NIN + ICIN,RMS IRMS,RATED
of the switching cycle. Therefore, the total output ripple
current and voltage are reduced in a multi?phase converter.
3. Input Capacitor Selection
The choice and number of input capacitors is primarily
determined by their voltage and ripple current ratings. The
designer must choose capacitors that will support the worst
case input voltage with adequate margin. To calculate the
number of input capacitors one must first determine the total
RMS input ripple current. To this end, begin by calculating
the average input current to the converter:
) D IC,IN2 3) ) IIN,AVG2 @ (1 * 2D)]1 2
Select the number of input capacitors (N IN ) to provide the
RMS input current (I CIN,RMS ) based on the RMS ripple
current rating per capacitor (I RMS,RATED ):
(12)
For a two?phase converter with perfect efficiency ( η = 1),
the worst case input ripple?current will occur when the
converter is operating at a 25% duty cycle. At this operating
point, the parallel combination of input capacitors must
IIN,AVG + IO,MAX @ D h
(5)
support an RMS ripple current equal to 25% of the
converter ’s DC output current. At other duty cycles, the
where:
D is the duty cycle of the converter, D = V OUT /V IN .
η is the specified minimum efficiency.
I O,MAX is the maximum converter output current.
The input capacitors will discharge when the control FET
is ON and charge when the control FET is OFF as shown in
Figure 15.
ripple?current will be less. For example, at a duty cycle of
either 10% or 40%, the two?phase input ripple?current will
be approximately 20% of the converter’s DC output current.
In general, capacitor manufacturers require derating to the
specified ripple?current based on the ambient temperature.
More capacitors will be required because of the current
derating. The designer should be cognizant of the ESR of the
input capacitors. The input capacitor power loss can be
I C,MAX
I C,MIN
D I C,IN = I C,MAX ? I C,MIN
calculated from:
PCIN + ICIN,RMS2 @ ESR_per_capacitor NIN (13)
0A
?I IN,AVG
t ON
FET Off,
Caps Charging
T/2
Low ESR capacitors are recommended to minimize losses
and reduce capacitor heating. The life of an electrolytic
capacitor is reduced 50% for every 10 ° C rise in the
capacitor ’s temperature.
4. Input Inductor Selection
FET On,
Caps Discharging
Figure 15. Input Capacitor Current for a
Two?Phase Converter
The following equations will determine the maximum and
minimum currents delivered by the input capacitors:
The use of an inductor between the input capacitors and
the power source will accomplish two objectives. First, it
will isolate the voltage source and the system from the noise
generated in the switching supply. Second, it will limit the
inrush current into the input capacitors at power up. Large
inrush currents will reduce the expected life of the input
capacitors. The inductor ’s limiting effect on the input
current slew rate becomes increasingly beneficial during
IC,MAX + ILo,MAX h * IIN,AVG
IC,MIN + ILo,MIN h * IIN,AVG
I Lo,MAX is the maximum output inductor current:
ILo,MAX + IO,MAX 2 ) D ILo 2
I Lo,MIN is the minimum output inductor current:
ILo,MIN + IO,MAX 2 * D ILo 2
(6)
(7)
(8)
(9)
load transients.
The worst case input current slew rate will occur during
the first few PWM cycles immediately after a step?load
change is applied as shown in Figure 16. When the load is
applied, the output voltage is pulled down very quickly.
Current through the output inductors will not change
instantaneously so the initial transient load current must be
conducted by the output capacitors. The output voltage will
step downward depending on the magnitude of the output
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCP5322ADWG | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC |
| NCP5322ADWR2 | 功能描述:DC/DC 开关控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| NCP5322ADWR2G | 制造商:Rochester Electronics LLC 功能描述: 制造商:ON Semiconductor 功能描述: |
| NCP5331 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Two-Phase PWM Controller with Integrated Gate Drivers |
| NCP5331/D | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Two Phase PWM Controller with Integrated Gate Drivers |
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