参数资料
型号: NCP5380AMNR2G
厂商: ON Semiconductor
文件页数: 9/28页
文件大小: 0K
描述: IC CTLR SYNC BUCK SGL 32QFN
标准包装: 5,000
应用: 控制器,Intel VR11
输入电压: 5V
输出数: 1
输出电压: 0.5 V ~ 1.6 V
工作温度: -40°C ~ 100°C
安装类型: 表面贴装
封装/外壳: 32-VFQFN 裸露焊盘
供应商设备封装: 32-QFN(5x5)
包装: 带卷 (TR)
NCP5380, NCP5380A
Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25 to
31
32
Flag
Mnemonic
PWRGD
IMON
N/C
FBRTN
FB
COMP
GND
ILIM
IREF
RPM
RT
RAMP
LLINE
CSREF
CSFB
CSCOMP
GND
PGND
DRVL
PVCC
SW
DRVH
BST
VCC
VID7 to VID1
EN
PGND
Description
Power ? Good Output. Open ? drain output. A low logic state means that the output voltage is outside of the
VID DAC defined range.
Current Monitor Output. This pin sources current proportional to the output load current. A resistor
connected to VSS Sense sets the current monitor gain.
Feedback Return Input/Output. This pin remotely senses the output voltage. It is also used as the ground
return for the VID DAC and the voltage error amplifier blocks. It is also used to adjust the no ? load offset.
Voltage Error Amplifier Feedback Input. The inverting input of the voltage error amplifier.
Voltage Error Amplifier Output and Frequency Compensation Point.
Analog and digital signal ground.
Current Limit Set pin. Connect a resistor between ILIM and CSCOMP to the current limit threshold.
This pin sets the internal bias currents. A 100 k W is connected from IREF to ground.
RPM Mode Timing Control Input. A resistor is connected from RPM to ground sets the RPM mode turn ? on
threshold voltage.
PWM Oscillator Frequency Setting Input. An external resistor from this pin to GND sets the PWM oscillator
frequency.
PWM Ramp Slope Setting Input. An external resistor from the converter input voltage node to this pin sets
the slope of the internal PWM stabilizing ramp.
Load Line Programming Input. The center point of a resistor divider connected between CSREF and
CSCOMP tied to this pin sets the load line slope.
Current Sense Reference Input. This pin must be connected to the opposite side of the output inductor.
Noninverting Input of the Current Sense Amplifier. The combination of a resistor from the switch node to
this pin and the feedback network from this pin to the CSCOMP pin sets the gain of the current sense
amplifier.
Current Sense Amplifier Output.
Analog and Digital Signal Ground.
Low ? Side Driver Power Ground. This pin should be connected close to the source of the lower
MOSFET(s).
Low ? Side Gate Drive Output.
Power Supply Input/Output of Low ? Side Gate Driver.
Current Return For High ? Side Gate Drive.
High ? Side Gate Drive Output.
High ? Side Bootstrap Supply. A capacitor from this pin to SW holds the bootstrapped voltage while the
high ? side MOSFET is on.
Power Supply Input/Output of the Controller.
Voltage Identification DAC Inputs. A 7 ? bit word (the VID code) programs the DAC output voltage, the
reference voltage of the voltage error amplifier without a load (see the VID code table, Table 4). In normal
operation mode, the VID DAC output programs the output voltage to a value within the 0 V to 1.6 V range
(with FBRTN = 112.5 mV). The input is actively pulled down.
Enable Input. Driving this pin low shuts down the chip, disables the driver outputs, and pulls PWRGD low.
High current power supply return via metal pad (flag) underneath package. Connect to pin 7.
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