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参数资料
| 型号： | NCP5425DBG |
| 厂商： | ON Semiconductor |
| 文件页数： | 19/22页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 20TSSOP |
| 标准包装： | 75 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 938kHz |
| 占空比： | 100% |
| 电源电压： | 4.75 V ~ 13.2 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 125°C |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 管件 |
NCP5425
The values of R2 and R3 can be found by solving two
simultaneous equations:
R2 + R3 2
R1 + (R2 * R3) (R2 ) R3)
Solving for R2 and R3 yields:
R2 + 1.5R1
R3 + 3R1
Example 2
Assume we have elected to source 66.7% output current
from the Master controller, and 33.3% from the Slave.
Figure 13 shows the configuration of the inductor sense
networks and Slave error amplifier for this case. The ratio of
Master?to?Slave load current is equal to 66.7%/33.3%, or
2:1. Therefore R2 and R3 must be chosen to satisfy two
conditions:
A parallel equivalent resistance equal to R1, and,
A ratio such that the drop across the parasitic resistance of
the Master inductor is 2 times the drop across the parasitic
resistance of the Slave inductor when the inputs to the
Slave error amplifier are equal (assumes the inductors are
identical). The optimum value of R1 is described by the
equation:
R1 + Lx (C1 * Rx)
Vin
Vout
Q1
L1
The values of R2 and R3 can be found by solving two
simultaneous equations:
R2 + R3
R1 + (R2 * R3) (R2 ) R3)
Solving for R2 and R3 yields:
R2 + 2R1
R3 + 2R1
Note that the Mode pin must be floating for a two?phase,
single output design. This disables the internal Error
Amplifier Reference clamp, and increases its common mode
range.
No Load Zero Balance
To improve current matching, a low pass filter can be
inserted between the Master controller inductor sensing RC
network and the Slave controller Vref2 input pin (see
Figure 14). This will attenuate the amplitude of the
out?of?phase ripple current signal superimposed on the DC
current signal, providing a smoother Slave Error Amplifier
reference input.
Q3
L2
Q2
R1
C1
C2
R2
Q4
R3
C3
Master
Error Amp
?
+
Vfb1
R4
R F
Vfb2
Vref2
?
+
Slave
Error Amp
Low Pass
Internal
Filter
C F
0.8 V Ref.
Figure 14. Addition of a Low Pass Filter to the Current Sense Reference Input
With the value of R F set to approximately two times the
value of R1, Cf can be calculated as follows:
Cf + 1 (2 p · f · RF), where :
f = operating frequency of the controller
Configuring a Dual Output Application
To configure the NCP5425 for a dual output application:
? The Mode pin must be grounded
? An external voltage reference must be provided for
Controller 2, via the Vref2 pin
When a filter is added, the response delay introduced by
the RC time constant must be considered.
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| NCP5425DBR2 | 功能描述:DC/DC 开关控制器 Dual Synchronous RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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| NCP5425S0EVB | 制造商:ON Semiconductor 功能描述: |
| NCP5425SOEVB | 功能描述:电源管理IC开发工具 ANA SW REG EVAL BRD RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
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