参数资料
型号: NCV7361ADR2G
厂商: ON Semiconductor
文件页数: 6/27页
文件大小: 0K
描述: IC REG LDO 5V 50MA 8-SOIC
产品变化通告: Product Discontinuation 27/Jan/2012
标准包装: 2,500
稳压器拓扑结构: 正,固定式
输出电压: 5V
输入电压: 5.25 V ~ 18 V
稳压器数量: 1
电流 - 输出: 50mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOICN
包装: 带卷 (TR)
NCV7361A
ELECTRICAL CHARACTERISTICS (7.0 V v V SUP v 18 V, ? 40 ° C v T A v 125 ° C unless otherwise noted)
Characteristic
Symbol
Condition
Min
Typ
Max
Unit
RESET AC CHARACTERISTICS
Reset Time
Reset Rise Time (Note 9)
BUS Debounce Time (Note 14)
Wake ? Up Time
t Res
t rr
t deb_BUS
t Wake_BUS
?
?
?
?
50
3.0
1.5
25
100
7.5
2.8
60
140
15
4.0
120
ms
m s
m s
m s
GENERAL LIN BUS INTERFACE AC CHARACTERISTICS
Transmit Propagation Delay
TxD ? > BUS (Notes 10 and 11)
Symmetry of Propagation Delay
BUS ? > RxD (Note 10)
Receiver Propagation Delay
BUS ? > RxD (Notes 10 and 11)
Symmetry of Propagation Delay
TxD ? > BUS (Note 10)
Slew Rate BUS Rising Edge (Note 9)
Slew Rate BUS Falling Edge (Note 9)
t dr_TxD ,
t df_TxD
t dsym_TxD
t dr_RxD
t df_RxD
t dsym_RxD
dV/dT rise
dV/dT fall
R L /C L at BUS
1.0 k W /1.0 nF
660 W /6.8 nF
500 W /10 nF
V SUPMIN = 8 V
t dr_TxD ? t df_TxD
V SUPMIN = 8 V
C L(RxD) = 50 pF
V SUPMIN = 8 V
t dr_RxD ? t df_RxD
V SUPMIN = 8 V
20% v V BUS v 80%
C L = 1.0 nF, R L = 1.0 k W
V SUPMIN = 8 V
20% v V BUS v 80%
C L = 1.0 nF, R L = 1.0 k W
V SUPMIN = 8 V
?
? 2.0
?
? 2.0
1.0
? 2.5
?
?
?
?
1.7
? 1.7
4.0
2.0
6.0
2.0
2.5
? 1.0
m s
m s
m s
m s
V/ m s
V/ m s
LIN BUS PARAMETER ACCORDING TO LIN SPEC. REV. 1.3
Slope Time, Transition from Recessive to
Dominant (Notes 11 and 12)
Slope Time, Transition from Dominant to
Recessive (Notes 11 and 13)
Slope Time Symmetry
Slope Time, Transition from Recessive to
Dominant (Notes 11 and 12)
Slope Time, Transition from Dominant to
Recessive (Notes 11 and 13)
Slope Time Symmetry
t sdom
t srec
t ssym
t sdom
t srec
t ssym
V SUP = 8.0 V
R L = 500 W /C L = 10 nF
V SUP = 8.0 V
R L = 500 W /C L = 10 nF
V SUP = 8.0 V
R L = 500 W /C L = 10 nF
T ssym = t sdom ? t srec
V SUP = 18 V
R L = 500 W /C L = 10 nF
V SUP = 18 V
R L = 500 W /C L = 10 nF
V SUP = 18 V
R L = 500 W /C L = 10 nF
T ssym = t sdom ? t srec
?
?
? 7.0
?
?
? 5.0
?
?
?
?
?
?
12
12
1.0
18
18
5.0
m s
m s
m s
m s
m s
m s
9. Not production tested, guaranteed by design and qualification.
10. See Figures 2 and 3, Timing Diagrams.
11. See Figures 5, 6, 7, 8, and 9 for test setup.
12. t sdom = (t VBUS40% ? t VBUS95% ) / 0.55.
13. t sdom = (t VBUS60% ? t VBUS5% ) / 0.55.
14. See Figure 18.
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