参数资料
| 型号： | NCV7703BD2R2G |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | IC DVR HALF BRIDGE TRPL 14SOIC |
| 标准包装： | 2,500 |
| 类型： | 半桥 |
| 输入类型： | SPI |
| 输出数： | 3 |
| 导通状态电阻： | 800 毫欧 |
| 电流 - 输出 / 通道： | 500mA |
| 电流 - 峰值输出： | 1A |
| 电源电压： | 5.5 V ~ 40 V |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 14-SOICN |
| 包装： | 带卷 (TR) |
NCV7703B
SPI Communication
Standard 16?bit communication has been implemented to
this IC to turn drivers on/off, and to report faults. (See
Figure 11). The LSB (Least Significant Bit) is clocked in
first.
Communication is Implemented as Follows:
1. CSB goes low to allow serial data transfer.
2. A 16 bit word is clocked (SCLK) into the SI
(Serial Input) pin.
3. CSB goes high to transfer the clocked in
information to the data registers.
NOTE: SO is tristate when CSB is high.
Frame detection starts
after the CSB falling edge
and the SCLK rising edge.
CSB
SCLK
Frame Detection
Input word integrity (SI) is evaluated by the use of a frame
consistency check. The word frame length is compared to an
h x 16 bit acceptable word length before the data is latched
into the input register. This guarantees the proper word
length has been imported and allows for daisy chain
operation applications.
The frame length detector is enabled with the CSB falling
edge and the SCLK rising edge.
SCLK must be low during the CSB rising edge. The fault
register is cleared with a valid frame detection. Existing
faults are re?latched after the fault filter time.
Frame detection mode ends with
CSB rising edge.
SI
SRR
OUTL1 OUTH1 OUTL2 OUTH2 OUTL3 OUTH3
X
X
X
X
X
X
OCD
X
OVLO
Internal Counter 1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Valid 16 bits shown
Figure 10. Frame Detection
CSB
SI
SRR
OUTL1 OUTH1 OUTL2 OUTH2 OUTL3 OUTH3
X
X
X
X
X
X
OCD
X
OVLO
SCLK
SO
TW
OUTL1 OUTH1 OUTL2 OUTH2 OUTL3 OUTH3
X
X
X
X
X
X
OLD
ULD
PSF
Figure 11. SPI Communication Frame Format
Table 1 defines the programming bits and diagnostic bits.
Figure 11 displays the timing diagram associated with
Table 1. Fault information is sequentially clocked out the
SO pin of the NCV7703B as programming information is
clocked into the SI pin of the device. Daisy chain
communication between SPI compatible IC’s is possible by
connection of the Serial Output pin (SO) to the input of the
sequential IC (SI) (Reference the Daisy Chain Section).
http://onsemi.com
11
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相关代理商/技术参数 |
参数描述 |
|---|---|
| NCV7703D2G | 功能描述:功率驱动器IC TRPL HALF BRDGE DRVR RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| NCV7703D2R2G | 功能描述:功率驱动器IC TRPL HALF BRDGE DRVR RoHS:否 制造商:Micrel 产品:MOSFET Gate Drivers 类型:Low Cost High or Low Side MOSFET Driver 上升时间: 下降时间: 电源电压-最大:30 V 电源电压-最小:2.75 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 封装:Tube |
| NCV7703D2R2G/H | 制造商:ON Semiconductor 功能描述: |
| NCV7703GEVB | 功能描述:电源管理IC开发工具 EVAL BRD RoHS:否 制造商:Maxim Integrated 产品:Evaluation Kits 类型:Battery Management 工具用于评估:MAX17710GB 输入电压: 输出电压:1.8 V |
| NCV7707DQG | 制造商:ON Semiconductor 功能描述:EACH / DOOR-MODULE DRIVER-IC |
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