参数资料
型号: NCV8612BMNR2G
厂商: ON Semiconductor
文件页数: 3/26页
文件大小: 0K
描述: IC REG LDO 5V/3.3V/ADJ 20DFN
标准包装: 2,500
稳压器拓扑结构: 正,固定式和可调式
输出电压: 5V,3.3V,可调式
输入电压: 7 V ~ 18 V
稳压器数量: 3
电流 - 输出: 120mA,80mA,400mA
电流 - 限制(最小): 180mA,120mA,500mA
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 20-VFDFN 裸露焊盘
供应商设备封装: 20-QFN(6x5)
包装: 带卷 (TR)
NCV8612B
PIN FUNCTION DESCRIPTIONS
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
EP
Symbol
ASO_RAIL
VIN ? B
VIN ? H
VIN ? A
VBATT_MON
HV_DET
BO_DET
EN
GND
HOT_FLG
IGNIN
IGOUT
GND
DLY
RST
V OUT3 FB
V OUT1
V OUT2
V OUT3
VIN_S3
?
Description
Output/Input of the automatic switchover (ASO) circuitry. Place a 1 uF ceramic capacitor on
this pin to provide local bypassing to the LDO linear regulator pass devices.
Primary power supply input. Connect battery to this pin through a blocking diode.
Holdup power supply rail. Connect a storage capacitor to this pin to provide a temporary
backup rail during loss of battery supply. A bleed resistor (typically 1 k W ) is needed from VIN ?
B to this pin in order to trickle charge this capacitor.
Voltage monitor which determines whether the 8 V supply is able to power the outputs. If the
8 V supply is present, the FET’s connected to VIN ? B and VIN ? H will be turned off, and the 8 V
supply will be providing power to the outputs. If the 8 V supply is not present, the FET’s on
VIN ? B and VIN ? H will be left on, and the greater of those voltages will be driving the outputs.
VBATT monitor pin. To operate overvoltage shutdown, HV_DET and BO_DET, connect this pin
to ASO_RAIL or battery. To eliminate overvoltage shutdown, HV_DET and BO_DET, tie this
pin to ground.
High ? voltage detect output. When VBATT_MON surpasses 19 V, this pin will be driven to
ground. During normal operation, this pin is held at V PP .
Brown out indicator output. When VBATT_MON and VIN ? A falls below 7.5 V, this pin will be
driven to ground. During normal operation, this pin is held at V PP .
Enable pin for the LDO linear regulators. Logic high on this pin will enable the LDO linear regu-
lators. Driving this pin to ground will place the IC in a low power shutdown state.
Ground. Reference point for internal signals. Internally connected to pin 13. Ground is not con-
nected to the exposed pad of the DFN20 package.
Thermal warning indicator. This pin provides an early warning signal of an impending thermal
shutdown.
Ignition buffer input
Ignition buffer logic output
Ground. Reference point for internal signals. Internally connected to pin 9. Ground is not con-
nected to the exposed pad of the DFN20 package.
Delay pin. Connect a capacitor to this pin to set the delay time.
Reset pin. Monitors V OUT1.
Voltage Adjust Input; use an external voltage divider to set the output voltage
5 V output. Voltage is internally set.
3.3 V output. Voltage is internally set.
Adjustable voltage output. This voltage is set through an external resistor divider.
Supply rail for the standby linear regulator VOUT3. Tie this pin to ASO_RAIL or a separate
supply rail.
Exposed Pad of DFN device. This pad serves as the main path for thermal spreading. The
Exposed Pad is not connected to IC ground.
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