参数资料
型号: NDS355AN
厂商: Fairchild Semiconductor
文件页数: 3/7页
文件大小: 0K
描述: MOSFET N-CH 30V 1.7A SSOT3
产品培训模块: High Voltage Switches for Power Processing
SMPS Power Switch
产品变化通告: Mold Compound Change 08/April/2008
产品目录绘图: SuperSOT-3, SOT-23
标准包装: 1
FET 型: MOSFET N 通道,金属氧化物
FET 特点: 逻辑电平门
漏极至源极电压(Vdss): 30V
电流 - 连续漏极(Id) @ 25° C: 1.7A
开态Rds(最大)@ Id, Vgs @ 25° C: 85 毫欧 @ 1.9A,10V
Id 时的 Vgs(th)(最大): 2V @ 250µA
闸电荷(Qg) @ Vgs: 5nC @ 5V
输入电容 (Ciss) @ Vds: 195pF @ 15V
功率 - 最大: 460mW
安装类型: 表面贴装
封装/外壳: TO-236-3,SC-59,SOT-23-3
供应商设备封装: 3-SSOT
包装: 标准包装
产品目录页面: 1602 (CN2011-ZH PDF)
其它名称: NDS355ANDKR
Electrical Characteristics (T A = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I S
I SM
Maximum Continuous Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
0.42
10
A
A
V SD
Drain-Source Diode Forward Voltage
V GS = 0 V, I S =0.42 A (Note 2)
0.8
1.2
V
Notes:
1. R θ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θ JC is guaranteed by
design while R θ CA is determined by the user's board design.
P D ( t ) =
T J ? T A
R θ J A ( t )
=
T J ? T A
R θ J C + R θ CA ( t )
= I 2 D ( t ) × R DS ( ON )
T J
Typical R θ JA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250 o C/W when mounted on a 0.02 in 2 pad of 2oz copper.
b. 270 o C/W when mounted on a 0.001 in 2 pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
NDS355AN Rev.C
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