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| 型号： | P83C280 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(带DDC接口，同步监测和同步处理的监视器微控制器) |
| 中文描述： | 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP42 |
| 封装： | 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42 |
| 文件页数： | 54/84页 |
| 文件大小： | 420K |
| 代理商： | P83C280 |
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1997 Dec 12
54
Philips Semiconductors
Product specification
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
P83Cx80; P87C380
19.1.8
V
ERTICAL FREE RUNNING
F
REQUENCY
/P
ERIOD AND
P
ULSE
W
IDTH
R
EGISTER
(VFPOPW)
Table 57
Vertical free running Frequency/Period and Pulse Width Register (SFR address FAH)
Table 58
Description of VFPOPW bits
19.1.9
P
ULSE GENERATION
C
ONTROL
R
EGISTER
(PULCNT)
Table 59
Pulse generation Control Register (SFR address FBH)
Table 60
Description of PULCNT bits
7
6
5
4
3
2
1
0
VFP1
VFP0
VOPW3
VOPW2
VOPW1
VOPW0
BIT
SYMBOL
DESCRIPTION
7 to 6
5
4
3 to 0
VFP1
VFP0
VOPW3 to VOPW0
Reserved.
Indicate the lower two bits of the 10 bits for programming the free running
vertical output pulse.
Indicate the vertical output pulse width.
7
6
5
4
3
2
1
0
CLMPEN
PATTYP
VPG
PVSI
HPG1
HPG0
FBPO
PHSI
BIT
SYMBOL
DESCRIPTION
7
CLMPEN
Clamping pulse output (CLAMP) enable
. If CLMPEN = 1, pin
PWM8/CLAMP/P3.0 is switched to the CLAMP output. If CLMPEN = 0,
the CLAMP function is disabled. The CLAMP function always overrides
other alternative functions such as PWM8 and P3.0.
Basic display patterns selection
. If PATTYP = 0, the white display
pattern is selected. If PATTYP = 1, the cross hatch display pattern is
selected.
Vertical pulse output modes selection
. If VPG = 0, a free running
vertical sync pulse signal is selected. If VPG = 1, a vertical substitution
pulse signal is selected.
Vertical output pulse polarity selection
. If PVSI = 0, the positive
polarity is selected. If PVSI = 1, the negative polarity is selected.
Horizontal pulse output modes selection
; see Table 61.
The clamp pulse at the back porch or at the front porch selection
.
This bit is only valid when CLMPEN is set HIGH. If FBPO = 1, the
horizontal back porch clamp pulse is selected. If FBPO = 0, the
horizontal front porch clamp pulse is selected.
Polarity of the horizontal and clamping output pulse indication.
If PHSI = 0, the positive polarity is selected. If PHSI = 1, the negative
polarity is selected.
6
PATTYP
5
VPG
4
PVSI
3 to 2
1
HPG1 to HPG0
FBPO
0
PHSI
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| P83C380 | Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(带DDC接口，同步监测和同步处理的监视器微控制器) |
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| P83C366 | 制造商:PHILIPS 制造商全称:NXP Semiconductors 功能描述:Microcontrollers for PAL/SECAM TV with OSD and VST |
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