参数资料
型号: P83C280
厂商: NXP SEMICONDUCTORS
元件分类: 微控制器/微处理器
英文描述: Microcontrollers for monitors with DDC interface, auto-sync detection and sync proc(带DDC接口,同步监测和同步处理的监视器微控制器)
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDIP42
封装: 0.600 INCH, PLASTIC, SOT-270-1, SDIP-42
文件页数: 7/84页
文件大小: 420K
代理商: P83C280
1997 Dec 12
7
Philips Semiconductors
Product specification
Microcontrollers for monitors with DDC
interface, auto-sync detection and sync proc.
P83Cx80; P87C380
5.2
Pin description
Table 2
Pin description for SDIP42 (SOT270-1)
SYMBOL
PIN
DESCRIPTION
PWM9/PATOUT/P3.1
PWM8/CLAMP/P3.0
PWM7/P2.7
PWM6/P2.6
PWM5/P2.5
PWM4/P2.4
PWM3/P2.3
PWM2/P2.2
PWM1/P2.1
PWM0/P2.0
XTAL1
XTAL2
V
DD
V
SS
HSYNC
in
/PROG
41
42
1
2
3
4
5
6
7
8
9
10
11
12
13
PWM9 to PWM0
: 8-bit Pulse Width Modulation outputs 9 to 0. Pin 41 and 42 can
also be used as the output pin of the test pattern display PATOUT and clamping out
signal CLAMP respectively; PATOUT and CLAMP always have the higher priority.
Alternative function general I/O ports;
Port 3: P3.1 to P3.0
and
Port 2: P2.7 to P2.0
.
Oscillator input pin for system clock.
Oscillator output pin for system clock.
Digital power supply (+5 V).
Digital ground.
Horizontal sync input pin. During OTP programming it is used as the program pulse
input (PROG).
Horizontal sync output pin; alternative function: general I/O port P1.5.
Composite sync input pin; alternative function: general I/O port P1.6.
Vertical sync input pin. During OTP programming it is used as output strobe (OE).
Vertical sync output pin; alternative function: general I/O port P1.4.
18 to 25 Port 0: general I/O ports; capability to drive LED.
26
Reset input; active HIGH initializes the device.
27 to 30 8-bit DAC analog voltage output pins; output range: 0 to 5 V.
31
Analog ground for DAC and ADC.
32
Analog power supply (+5 V) for DAC and ADC.
33
ADC analog input pins; alternative function: general I/O ports P3.2 and P3.3.
34
35
External interrupt input pin. During OTP programming it is used as programming
supply voltage pin; V
PP
= 12.75 V.
36
I
2
C-bus serial data I/O port for the DDC2 interface; alternative function: general I/O
port P1.3.
37
I
2
C-bus serial clock I/O port for the DDC2 interface; alternative function: general I/O
port P1.2.
38
I
2
C-bus serial data I/O port; alternative function: general I/O port P1.1.
39
I
2
C-bus serial clock I/O port; alternative function: general I/O port P1.0.
40
14-bit Pulse Width Modulation output 10; alternative function: general I/O port P1.7.
HSYNC
out
/P1.5
CSYNC
in
/P1.6
VSYNC
in
/OE
VSYNC
out
/P1.4
P0.7 to P0.0
RESET
DAC0 to DAC3
V
SSA
V
DDA
ADC0/P3.2
ADC1/P3.3
INT1/V
PP
14
15
16
17
SDA1/P1.3
SCL1/P1.2
SDA/P1.1
SCL/P1.0
PWM10/P1.7
相关PDF资料
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