参数资料
型号: P89LPC9107FDH,129
厂商: NXP Semiconductors
文件页数: 1/39页
文件大小: 0K
描述: IC 80C51 MCU FLASH 1K 14-TSSOP
产品培训模块: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
标准包装: 960
系列: LPC900
核心处理器: 8051
芯体尺寸: 8-位
速度: 18MHz
连通性: UART/USART
外围设备: 欠压检测/复位,LED,POR,PWM,WDT
输入/输出数: 12
程序存储器容量: 1KB(1K x 8)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2.4 V ~ 3.6 V
数据转换器: A/D 4x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
包装: 管件
产品目录页面: 706 (CN2011-ZH PDF)
配用: DB-TSSOP-LPC9107-ND - BOARD FOR LPC9107 TSSOP
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1003-ND - KIT FOR LCD DEMO
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名称: 568-2002-5
935278497129
P89LPC9107FDH-S
1.
General description
The P89LPC9102/9103/9107 are single-chip microcontrollers in low-cost 10-pin and
14-pin packages based on a high performance processor architecture that executes
instructions in two to four clocks, six times the rate of standard 80C51 devices. Many
system-level functions have been incorporated into the P89LPC9102/9103/9107 in order
to reduce component count, board space, and system cost.
2.
Features
2.1 Principal features
I 1 kB byte-erasable ash code memory organized into 256-byte sectors and 16-byte
pages. Single-byte erasing allows any byte(s) to be used as non-volatile data storage.
I 128-byte RAM data memory.
I Two 16-bit timer/counters (P89LPC9102/9107). Two 16-bit timers (P89LPC9103)
I 23-bit system timer that can also be used as a RTC.
I Four input multiplexed 8-bit A/D converter/single DAC output. One analog comparator
with selectable reference.
I Enhanced UART with fractional baud rate generator, break detect, framing error
detection, automatic address detection and versatile interrupt capabilities
(P89LPC9103/9107).
I High-accuracy internal RC oscillator option, factory calibrated to 1 %, allows operation
without external oscillator components. The RC oscillator option is selectable and ne
tunable.
I VDD operating range of 2.4 V to 3.6 V with 5 V tolerant I/O pins (may be pulled up or
driven to 5.5 V).
I Up to 10 (P89LPC9107) or eight (P89LPC9102/9103) I/O pins when using internal
oscillator and reset options.
I Ultra-small 10-pin HVSON package (P89LPC9102/9103). 14-pin TSSOP and DIP
packages (P89LPC9107).
2.2 Additional features
I A high performance 80C51 CPU provides instruction cycle times of 136 ns to 272 ns
for all instructions except multiply and divide when using the internal 7.3728 MHz RC
oscillator in clock doubling mode (111 ns to 222 ns when using an external 18 MHz
clock). A lower clock frequency for the same performance results in power savings and
reduced EMI.
P89LPC9102/9103/9107
8-bit microcontrollers with two-clock accelerated 80C51 core
1 kB 3 V byte-erasable ash with 8-bit A/D converter
Rev. 03 — 10 July 2007
Product data sheet
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