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| 型号： | P8xCL580HFT |
| 厂商： | NXP Semiconductors N.V. |
| 英文描述： | Low voltage 8-bit microcontrollers with UART, I2C-bus and ADC |
| 中文描述： | 低电压8 - UART的，位微控制器的I2C总线和ADC |
| 文件页数： | 28/80页 |
| 文件大小： | 366K |
| 代理商： | P8XCL580HFT |
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1997 Mar 14
28
Philips Semiconductors
Product specification
Low voltage 8-bit microcontrollers with
UART, I
2
C-bus and ADC
P80CL580; P83CL580
15 I
2
C-BUS SERIAL I/O
The serial port supports the twin line I
2
C-bus, which
consists of a serial data line (SDA) and a serial clock line
(SCL). These lines also function as the I/O port lines P1.7
and P1.6 respectively.
The system is unique because data transport, clock
generation, address recognition and bus control arbitration
are all controlled by hardware.
The I
2
C-bus serial I/O has complete autonomy in byte
handling and operates in 4 modes:
Master transmitter
Master receiver
Slave transmitter
Slave receiver.
These functions are controlled by the Serial Control
Register S1CON. S1STA is the Status Register whose
contents may also be used as a vector to various service
routines. S1DAT is the Data Shift Register and S1ADR is
the Slave Address Register. Slave address recognition is
performed by on-chip hardware.
Figure 17 is the block diagram of the I
2
C-bus serial I/O.
Fig.17 Block diagram of I
2
C-bus serial I/O.
MLB199
SLAVE ADDRESS
S1ADR
GC
SHIFT REGISTER
S1DAT
SDA
ARBITRATION SYNC LOGIC
SCL
BUS CLOCK GENERATOR
S1STA
I
7
0
S1CON
7
0
7
0
7
0
CONTROL REGISTER
STATUS REGISTER
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