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参数资料
| 型号： | PC33989DW |
| 厂商： | MOTOROLA INC |
| 元件分类： | 网络接口 |
| 英文描述： | System Basis Chip with High Speed CAN Transceiver |
| 中文描述： | DATACOM, INTERFACE CIRCUIT, PDSO28 |
| 封装： | PLASTIC, SO-28 |
| 文件页数： | 12/32页 |
| 文件大小： | 676K |
| 代理商： | PC33989DW |
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MC33989
MC33989
4
GENERAL DESCRIPTION
The MC33989 is an integrated circuit dedicated to automotive applications. It includes the following functions:
- One full protected voltage regulator with 200mA total output current capability available at Vdd1 external pin.
- Driver for external path transistor for V2 regulator function.
- Reset, programmable watchdog function, INT, 4 operational modes
- Programmable wake up input and cyclic sense wake up
- Can high speed physical interface
4.1
Device Supply
The device is supplied from the battery line through the Vsup pin. An external diode is required to protect against negative
transients and reverse battery. It can operate from 4.5V and under the jump start condition at 27V DC. This pin sustains standard
automotive voltage conditions such as load dump at 40V. When Vsup falls below 3V typical the MC33989 detects it and store the
information into the SPI register, in a bit called “BATFAIL”. This detection is available in all operation modes.
The device incorporates a battery early warning function, which provides a maskable interrupt when the Vsup voltage is below
6V typical. An hysteresis is included. Operation is only in Normal and Standby modes. Vsup low is reported in IOR register.
4.2
Vdd1 Voltage Regulator
Vdd1 Regulator is a 5V output voltage with output current capability up to 200mA. It includes a voltage monitoring circuitry
associated with a reset function. The Vdd1 regulator is fully protected against over current, short-circuit and has over temperature
detection warning flags (bit VDDTEMP in MCR and INTR registers) and over temperature shutdown with hysteresis.
4.3
V2 regulator
V2 Regulator circuitry is designed to drive an external path transistor in order to increase output current flexibility. Two pins are
used: V2 and V2 ctrl. Output voltage is 5V and is realized by a tracking function of the Vdd1 regulator. Recommended ballast
transistor is MJD32C. Other transistor can be used, however depending upon the PNP gain an external resistor-capacitor
network might be connected. V2 is the supply input for the CAN cell. The state of V2 is reported in the IOR register (bit V2LOW set
to 1 if V2 is below 4.5V typical).
4.4
HS1 Vbat Switch Output
HS1 output is a 2 ohms typical switch from Vsup pin. It allows the supply of external switches and their associated pull up or
pull down circuitry, in conjunction with the wake up input pins for example. Output current is limited to 200mA and HS1 is
protected against short-circuit and has an over temperature shutdown (bit HS1OT in IOR and bit HS1OT-V2LOW in INTR
register). HS1 output is controlled from the internal register and SPI. It can be activated at regular intervals in sleep and stop
modes thanks to internal timer. It can also be permanently turned on in normal or stand-by modes to drive loads or supply
peripheral components. No internal clamping protection circuit is implemented, thus dedicated external protection circuit is
required in case of inductive load drive.
4.5
Battery fall early warning:
Refer to paragraph 4.1.
4.6
Internal Clock
The device has an internal clock used to generate all timings (reset, watchdog, cyclic wake up, filtering time etc....). Two
oscillators are implemented. A high accuracy (+-12%) used in Normal request, normal and standby modes and a low accuracy (+-
30%)used in sleep and stop modes.
4.7
Functional Modes
The device has four modes of operation, the stand-by mode, normal mode, stop and sleep modes. All modes are controlled by
the SPI. An additional temporary mode called “normal request mode” is automatically accessed by the device after reset or wake
up from stop mode. A reset mode is also implemented. Special modes and configuration are possible for debug and program
MCU flash memory.
4.7.1
Reset mode:
In this mode, reset pin is low, an a timer is running for a time “reset-dur”. After this time is ellapsed, the SBC enters Normal
Request mode. Reset mode is enter if a reset condition occurs (Vdd1 low, watchdog timeout or watchdog trigger in closed
window).
4.7.2
Normal request mode:
4.7.2.1
Description:
This is a temporary mode automatically accessed by the device after reset mode or after the SBC wake up from stop mode.
After wake up from sleep mode or after device power up the SBC enters the reset mode first and then enters the Normal request
mode. After a wake up from stop mode, the SBC enters Normal Request mode directly.
In Normal Request mode the Vdd1 regulator is ON, V2 is off, the reset pin is high. As soon as the device enters the normal
request mode an internal 350ms timer is started. During these 350ms the micro controller of the application must addressed the
SBC via SPI and configure the watchdog register. This is the condition for the SBC to stop the 350ms timer and to go into the
Normal mode or standby mode and to set the watchdog timer according to configuration.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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