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参数资料
| 型号： | PC33989DW |
| 厂商： | MOTOROLA INC |
| 元件分类： | 网络接口 |
| 英文描述： | System Basis Chip with High Speed CAN Transceiver |
| 中文描述： | DATACOM, INTERFACE CIRCUIT, PDSO28 |
| 封装： | PLASTIC, SO-28 |
| 文件页数： | 13/32页 |
| 文件大小： | 676K |
| 代理商： | PC33989DW |
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MC33989
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MC33989
4.7.2.2
Normal request entered and no W/D configuration occurs:
In case the Normal request mode is entered after SBC power up or after a wake up from stop mode, and if no W/D
configuration occurs while the SBC is in Normal request mode, the SBC goes to reset mode after the 350ms time period is
expired, and then goes again into Normal request mode. If no W/D configuration is done, the SBC alternatively goes from normal
request into reset then normal request modes etc.
In case the Normal request mode is entered after a wake up from sleep mode and if no W/D configuration occurs while the
SBC is in Normal request mode, the SBC goes back to sleep mode.
4.7.3
Normal mode:
In this mode both regulators are ON and this corresponds to the normal application operation. All functions are available in
this mode (watchdog, wake up input reading through SPI, HS1 activation, CAN communication). The software watchdog is
running and must be periodically cleared through SPI.
4.7.4
Standby mode:
Only the regulator 1 is ON. Regulator 2 is turned OFF by disabling the V2 ctrl pin. Only the wake-up capability of the CAN
interface is available. Other functions available are: wake up input reading through SPI, HS1 activation. The watchdog is running.
4.7.5
Sleep mode:
Regulators 1 and 2 are OFF. The current from Vsup pin is reduced. In this mode, the device can be awakened internally by
cyclic sense via the wake up inputs pins and HS1 output, from the “forced wake up” function and from the CAN physical interface.
When a wake up occurs the SBC goes first into reset mode, then enters Normal request mode.
4.7.6
Stop mode
4.7.6.1
Description
Regulator 2 is turned OFF by disabling the V2 ctrl pin. The regulator 1 is activated in a special low power mode which allow to
deliver few mA. The objective is to maintain the MCU of the application supplied while it is turned into power saving condition (i.e
stop or wait mode). In stop mode the device supply current from Vbat is very low.
When the application is in stop mode (both MCU and SBC), the application can wake up from the SBC side (ex cyclic sense,
forced wake up, CAN message, wake up inputs and over current on Vdd1) or the MCU side (key wake up etc.).
Stop mode is always selected by SPI. In stop mode the Software watchdog can be “running” or “not running” depending upon
selection by SPI (RCR register, bit WDSTOP). If W/D runs, to clear the W/D the SBC must be wake up by a CSB pin (SPI wake
up). In stop mode, SBC wake up capability are identical as in sleep mode. Refer to table 1.
4.7.6.2
Application wake up from SBC side:
When application is in stop mode, it can wake up from the SBC side. When a wake up is detected by the SBC (ex CAN, Wake
up input etc.) the SBC turns itself into Normal request mode and generates an interrupt pulse at the INTB pin.
4.7.6.3
Application wake up from MCU side:
When application is in stop mode, the wake up event may come from the MCU side. In this case the MCU signals to the SBC
by a low to high transition on the CSB pin. Then the SBC goes into Normal Request mode and generates an interrupt pulse at the
INTB pin.
4.7.6.4
Stop mode current monitor:
If the Vdd1 output current exceed an internal threshold (Idd1s-wu), the SBC goes automatically into normal request mode and
generates an interrupt at the INTB pin. The interrupt is not maskable and the interrupt register will have no flag set.
4.7.6.5
INT generation when wake up from stop mode:
When the SBC wakes up from stop mode, it first enters the normal request mode and then generates a pulse (10us typical) on
the INTB pin. These interrupts are not maskable, and the wake up event can be read through the SPI registers (CANWU bit in
RCR register and LCTRx bit in WUR register). In case of wake up from Stop mode over current or from forced wake up, no bit are
set. After the INT pulse the SBC accept SPi command after a time delay (Ts-1stspi parameter).
4.7.6.6
Software watchdog in stop mode:
If watchdog is enabled, the MCU has to wake up independently of the SBC before the end of the SBC watchdog time. In order
to do this the MCU has to signals the wake up to the SBC through the SPI wake up (CSB activation). Then the SBC wakes up and
jump into the normal request mode. MCU has to configured the SBC to go to either normal or standby mode. The MCU can then
decide to go back again to stop mode.
If no MCU wakes up occurs within the watchdog timing, the SBC will activate the reset pin and jump into the normal request
mode. The MCU can then be initialized.
4.7.6.7
Stop mode enter command:
Stop mode is entered at end of the SPI message at the rising edge fo the CSB . Refer to to ”Tcsb-stop” data in state machine
timing table.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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