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参数资料
| 型号： | PC33989DW |
| 厂商： | MOTOROLA INC |
| 元件分类： | 网络接口 |
| 英文描述： | System Basis Chip with High Speed CAN Transceiver |
| 中文描述： | DATACOM, INTERFACE CIRCUIT, PDSO28 |
| 封装： | PLASTIC, SO-28 |
| 文件页数： | 7/32页 |
| 文件大小： | 676K |
| 代理商： | PC33989DW |
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MC33989
7
MC33989
Figure 2. SPI Timing characteristic
Note:
Incomming data at MOSI pin is sampled by the SBC at SCLK falling edge.
Outcoming data at MISO pin is set by the SBC at SCLK rising edge (after Tvalid delay time).
Delay between CSB wake up (CSB low
to high) and SBC normal request mode
(Vdd1 on & reset high)
Tw-csb
15
40
90
us
SBC in stop mode
Delay between CSB wake up (CSB low
to high) and first accepted SPI command
Tw-spi
90
N/A
us
SBC in stop mode
Delay between INT pulse and 1st SPi
command accepted
Ts-1stspi
20
N/A
us
In stop mode after wake up
(V
sup
From 5.5V to 18V and Tamb -40°C to 125°C)
For all pins except CANH, CANL, Tx and Rx which are described in the CAN module section
Description
Symbol
Characteristics
Unit
Conditions
Min
Typ
Max
Di 0
Do 0
Undefined
Don’t Care
Di 8
Don’t Care
Tlead
Tsih
Tsisu
Tlag
Tpclk
Twclkh
Twclkl
Tvalid
Do 8
Tsodis
CSB
SCLK
MOSI
MISO
Tsoen
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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