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| 型号： | PC34708VMR2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA206 |
| 封装： | 13 X 13 MM, 0.80 MM PITCH, LEAD FREE, MO-275HHAC-1, MAPBGA-206 |
| 文件页数： | 127/200页 |
| 文件大小： | 5160K |
| 代理商： | PC34708VMR2 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
32
PC34708
Functional Block Requirements and Behaviors
Battery Management Block Description and Application Information
7.1.3.2
Over-voltage Protection
In order to protect the application, the voltage at the VBUSVIN, and VAUX pins are monitored. When the above is 6.5 V typical,
the external pass FETs will be disabled.
For the VBUS charge path, it means opening MVBUS. In the AUX path, it means opening MVBUS while MBATT is closed. In the
AUX path, it means opening MAUX. The corresponding interrupt VBUSOVP or AUXOVP is generated. When a VBUS over-voltage
is detected, the internal circuitry of the USB block is disconnected. The battery is also monitored for over-voltage conditions, and
the battery is protected by disabling the charger and setting the interrupt BATTOVP. In order to ensure immediate protection, the
control of MVBUS, MAUX, and MBATT occurs real-time, asynchronously to the charger state machine.
The interrupt for the over-voltage conditions on the battery is debounced by a programmable debounce period. VBUS and AUX
interrupts are debounced by SUP_OVP_DB[1:0]. When the over-voltage condition disappears for longer than the programmed
debounce time, charging will resume and previously programmed SPI settings will be reloaded. When a BATTOVP, AUXOVP,
or VBUSOVP interrupt is set, charging will not resume until the processor clears the interrupt.
7.1.3.3
Thermal Fold back
In order to protect the PMIC from overheating while charging, hardware based automatic thermal fold back is implemented. The
thermal fold back option is enabled by default (THFB_EN=1), but can be disabled by setting the SPI bit THFB_EN=0. The thermal
fold back is operational only when the buck input current limit is set to 1.5 Amps (ILIM_1P5 =1). With THFB_EN = 0 or ILIM_1P5
= 0, firmware will still receive the interrupts when crossing the thresholds but it will be up to the software to fold back the input
current limit manually. The thermal fold back will monitor the die temperature to determine when to decrease the buck current
limit. There are four thresholds which the PMIC will fold back the input current limit as seen in Table 18. These are 110 C
(THERM110), 120 C (THERM 120), 125 C (THERM125), and 130 C (THERM130C). The THERM1xx thresholds are debounced
by the SPI bits DIE_TEMP_DB[1:0], which are programmable from 100
μs to 4.0 ms (1.0 ms by default). When the die
temperature crosses these thresholds the corresponding sense bit will change and an interrupt will be generated to notify the
software that the hardware is reaching its thermal limit. THFB_DLY[1:0] (defaults to 10 ms) sets the delay between the interrupt
being sent to the processor and the time that the PMIC takes action by folding back the buck input current limit to prevent the die
from heating up. For example with THFB_EN=1, ILIM_1P5 =1 and THFB_MODE = 0, if the die heats up to 115C, the
THERM110S bit will change state from a zero to a one, the THERM110C interrupt will be set, and the buck input current limit will
be set to 950 mA. Should the die continue to heat up to 123 C then the THERM120S bit will be set and the THERM120 interrupt
will be generated and the buck current limit will be set to 500 mA. When the die temperature is greater than 130 C the charger
will be disabled. The THFB_MODE bit allows the firmware to select two preset thermal fold back options when the die
temperature reaches the specified range.
Table 16. Over-voltage Debounce Time SUP_OVP_DB[1:0]
SUP_OVP_DB[1:0]
Debounce Time
00
0 (default 1.0)
01
2 RTC clock cycles
10
4 RTC clock cycles
11
8 RTC clock cycles (default 2.0)
Table 17. Over-voltage Debounce Time OVDB[1:0]
OVPDB[1:0]
Debounce Time
00
0 (default 2.0
01
2 RTC clock cycles
10
4 RTC clock cycles
11
8 RTC clock cycles (default 1.0)
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