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参数资料
| 型号： | PC34708VMR2 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA206 |
| 封装： | 13 X 13 MM, 0.80 MM PITCH, LEAD FREE, MO-275HHAC-1, MAPBGA-206 |
| 文件页数： | 177/200页 |
| 文件大小： | 5160K |
| 代理商： | PC34708VMR2 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
78
PC34708
Functional Block Requirements and Behaviors
LDO Regulators Description and Application Information
7.5.2
General Features
The following applies to all linear regulators, unless otherwise specified.
Specifications are for an ambient temperature of –40 to +85 °C.
Advised bypass capacitor is the Murata GRM155R60G225ME95, which comes in a 0402 case.
In general, parametric performance specifications assume the use of low ESR X5R/X7R ceramic capacitors with 20%
accuracy and 15% temperature spread, for a worst case stack up of 35% from the nominal value. Use of other types with wider
temperature variation may require a larger room-temperature nominal capacitance value to meet performance specs over
temperature. In addition, capacitor derating as a function of DC bias voltage requires special attention. Finally, minimum
bypass capacitor guidelines are provided for stability and transient performance. Larger values may be applied; performance
metrics may be altered and generally improved, but should be confirmed in system applications.
Regulators which require a minimum output capacitor ESR (those with external PNPs) can avoid an external resistor if ESR
is assured with capacitor specifications or board level trace resistance.
The output voltage tolerance specified for each of the linear regulators include process variation, temperature range, static
line regulation, and static load regulation.
The PSRR of the regulators is measured with the perturbating signal at the input of the regulator. The power management IC
is supplied separately from the input of the regulator and does not contain the perturbated signal. During measurements, care
must be taken not to reach the drop out of the regulator under test.
In the Low Power mode, the output performance is degraded. Only those parameters listed in the Low Power mode section
are guaranteed. In this mode, the output current is limited to much lower currents than in the active mode.
Regulator performance is degraded in the extended input voltage range. This means that the supply still behaves as a
regulator, and will try to hold up the output voltage by turning the pass device fully on. As a result, the bias current will increase
and all performance parameters will be heavily degraded, such as PSRR and load regulation.
Note that the minimum operating range specifications in some cases may be conflicting, due to numerous set point and biasing
options, as well as the potential to run BP into one of the software or hardware shutdown thresholds. The specifications are
general guidelines that should be interpreted with some care in such cases.
When a regulator gets disabled, the output will be pulled towards ground by an internal pull-down. The pull-down is also
activated when RESETb goes low.
32 kHz spur levels are specified for fully loaded conditions.
Short-circuit protection (SCP) is included on certain LDOs (see the SCP section later in this section). Exceeding the SCP
threshold will disable the regulator and generate a system interrupt. The output voltage will not sag below the specified voltage
with the rated current being drawn. For the lower current LDOs without SCP, they are less accessible to the user environment
and essentially self-limiting.
The power tree of a given application must be scrubbed for critical use cases to ensure consistency and robustness in the
power strategy.
7.5.3
LDO Regulator Control
The regulators with embedded pass devices (VPLL, VGEN1, and VUSB) have an adaptive biasing scheme thus, there are no
distinct operating modes such as a Normal mode and a Low Power mode. Therefore, no specific control is required to put these
regulators in a Low Power mode.
The external pass regulator (VDAC) can also operate in a normal and low power mode. However, since a load current detection
cannot be performed for this regulator, the transition between both modes is not automatic and is controlled by setting the
corresponding mode bits for the operational behavior desired.
The regulators VUSB2, and VGEN2 can be configured for using the internal pass device or external pass device as explained in
Supplies. For both configurations, the transition between both modes is controlled by setting the VxMODE bit for the specific
regulator. Therefore, depending on the configuration selected, the automatic Low Power mode determines availability.
The regulators can be disabled and the general purpose outputs can be forced low when going into Standby (note that the
Standby response timing can be altered with the STBYDLY function, as described in the previous section). Each regulator has
an associated SPI bit for this. When the bit is not set, STANDBY is of no influence. The actual operating mode of the regulators
as a function of STANDBY is not reflected through SPI. In other words, the SPI will read back what is programmed, not the actual
state.
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| PC3-48-12 | 功能描述:DC/DC转换器 3W 12V 0.25A RoHS:否 制造商:Murata 产品: 输出功率: 输入电压范围:3.6 V to 5.5 V 输入电压（标称）: 输出端数量:1 输出电压（通道 1）:3.3 V 输出电流（通道 1）:600 mA 输出电压（通道 2）: 输出电流（通道 2）: 安装风格:SMD/SMT 封装 / 箱体尺寸: |
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