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Analog Integrated Circuit Device Data
Freescale Semiconductor
102
PC34708
Functional Block Requirements and Behaviors
32.768 kHz Crystal Oscillator RTC Block Description and Application Information
7.9.2
SRTC Support
When configured for DRM mode (SPI bit DRM = 1), the CLK32KMCU driver will be kept enabled through all operational states
to ensure that the SRTC module always has its reference clock. If DRM = 0, the CLK32KMCU driver will not be maintained in the
Off state.
It is also necessary to provide a means for the processor to do an RTC initiated wake-up of the system if it has been programmed
for such capability. This can be accomplished by connecting an open drain NMOS driver to the PWRON pin of the PC34708
PMIC, so that it is in effect, a parallel path for the power key. The PC34708 PMIC will not be able to discern the turn on event
from a normal power key initiated turn on, but the processor should have the knowledge, since the RTC initiated turn on is
generated locally.
Figure 21. SRTC Block Diagram
7.9.2.1
VSRTC
The VSRTC regulator provides the CLK32KMCU output level. Additionally, it is used to bias the Low Power SRTC domain of the
SRTC module integrated on certain FSL processors. The VSRTC regulator is enabled as soon as the RTCPORB is detected.
The VSRTC cannot be disabled.
Depending on the configuration of the PUMS[4:0] pins, the VSRTC voltage will be set to 1.3 or 1.2 V. With PUMS[4:0] = (0110,
0111, 1000, or 1001) VSRTC will be set to 1.3 V in on mode (on, on standby and on standby low power modes). In off and coin
cell modes the VSRTC voltage will drop to 1.2 V with the PUMS[4:0] = (0110, 0111, 1000, or 1001). With PUMS[4:0] = (0110,
0111, 1000, or 1001), VSRTC will be set to 1.2 V for all modes (on, on standby, on standby low power mode, off, and coincell).
CLK32KDC/
CLK32KMC
UDC
CLK32K and CLK32KMCU Output Duty Cycle
Crystal on XTAL1, XTAL2 pins
45
-
55
%
RMS Output Jitter
1 Sigma for Gaussian distribution
-
30
ns
RMS
Table 105. Oscillator and Clock Main Electrical Specifications
Characteristics noted under conditions BP = 3.6 V, VBUS = 5.0 V, -40°C ≤ TA ≤ 85°C, unless otherwise noted. Typical values at
BP = 3.6 V and TA = 25°C under nominal conditions, unless otherwise noted.
Symbol
Characteristic
Min
Typ
Max
Unit
Notes
+
-
34708
VCOREDIG
PWRONx
SPIVCC=1.8 V
GP Domain=1.1 V
LP Dominant=1.2 V
VSRTC=1.2 V
CKIL: VSRTC
0.1
μF
Coin Cell
Battery
Main
Battery
CLK32KMCU
VSRTC &
Detect
On
Detect
Best of
Supply
On/Off
Button
VCOREDIG
32 kHz
Open Drain output for RTC wake-up
Processor
I/O
Core Supply
SOG Supply
SRTC
HP-RC
LP-RTC
32 kHz for
DSM timing