参数资料
型号: PCA85132U/2DA/Q1,0
厂商: NXP Semiconductors
文件页数: 24/62页
文件大小: 0K
描述: IC LCD DRIVER 32 UNCASED
标准包装: 600
显示器类型: LCD
配置: 多重
接口: I²C
数字或字符: 任何数字类型
电流 - 电源: 60µA
电源电压: 1.8 V ~ 5.5 V
工作温度: -40°C ~ 95°C
封装/外壳: 模具
供应商设备封装: 模具
包装: 散装
NXP Semiconductors
PCA85132
LCD driver for low multiplex rates
7.5.1 Data pointer
The addressing mechanism for the display RAM is realized using the data pointer. This
allows the loading of an individual display data byte, or a series of display data bytes, into
any location of the display RAM. The sequence commences with the initialization of the
data pointer by the load-data-pointer command (see Table 7 on page 7 and Table 8 on
page 7 ). Following this command, an arriving data byte is stored at the display RAM
address indicated by the data pointer. The filling order is shown in Figure 13 .
After each byte is stored, the content of the data pointer is automatically incremented by a
value dependent on the selected LCD drive mode:
?
?
?
?
In static drive mode by eight
In 1:2 multiplex drive mode by four
In 1:3 multiplex drive mode by three
In 1:4 multiplex drive mode by two
If an I 2 C-bus data access is terminated early, then the state of the data pointer is
unknown. The data pointer should be re-written before further RAM accesses.
7.5.2 Subaddress counter
The storage of display data is conditioned by the content of the subaddress counter.
Storage is allowed only when the content of the subaddress counter matches with the
hardware subaddress applied to A0 and A1. The subaddress counter value is defined by
the device-select command (see Table 9 on page 7 ). If the content of the subaddress
counter and the hardware subaddress do not match then data storage is inhibited but the
data pointer is incremented as if data storage had taken place. The subaddress counter is
also incremented when the data pointer overflows.
The storage arrangements described lead to extremely efficient data loading in cascaded
applications. When a series of display bytes are sent to the display RAM, automatic
wrap-over to the next PCA85132 occurs when the last RAM address is exceeded.
Subaddressing across device boundaries is successful even if the change to the next
device in the cascade occurs within a transmitted character.
The hardware subaddress must not be changed while the device is being accessed on the
I 2 C-bus interface.
PCA85132
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 11 July 2013
? NXP B.V. 2013. All rights reserved.
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