参数资料
型号: PEF2080
厂商: SIEMENS AG
英文描述: S/T Bus Interface Circuit(SBC)
中文描述: S / T的总线接口电路(SBC)的
文件页数: 17/74页
文件大小: 2620K
代理商: PEF2080
Semiconductor Group
18
Functional Description
The other uses of the auxiliary pins are:
ENCK
input
Enable Clock. At “0”, forces the SBC to deliver IOM timing at all
times, regardless of SDI input level; in TE mode, pin X3.
BUS
input
At “1”, specifies a bus configuration (as opposed to point to point
or extended passive bus); in NT and LT-S modes, pin X3.
ECHO
output
push-pull
Reproduces the E bits received from the S interface
synchronously to IOM frame “D” bits (bit positions 24 and 25 of
IOM frame). All other bit positions are binary “1”; in TE mode, pin
X2.
SSZ
input
Send Single Zeros. At “0”, forces the SBC to transmit alternating
pulses at 250 s intervals (period 2 kHz) on S-interface for test
purposes; X2 in NT mode.
RDY
output
Ready. Provides a signal logically equal push to bit 3 of
MONITOR channel. Signals the pull D-channel status (“0” =
occupied, “1” = free) to layer-2 component; X0 in TE mode.
CON
input
Connected. At “0”, prevents the SBC from activating and
transmitting on the S interface. Indicates whether the device is
connected to the S interface or not; X0 in TE and LT-T modes.
DEX
input
External D-channel Echo enable. At “1”, makes the E-bit
dependent on the DE (X0) input. Used in NT mode to build a star
configuration; X1 in NT mode.
DE
input/output
open drain with
integrated pull-
up resistor
D-channel Echo. The DE outputs should be tied together (open
drain) in an NT-star configuration, to obtain the global echo bit;
X0 in NT mode.
TS0 to TS2
inputs
Time Slot 0 to 7. IOM interface time slot to be used =
4 x TS2 + 2 x TS1 + TS0; LT-T and LT-S in IOM-2 mode and
inverted mode.
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