参数资料
| 型号： | PI74SSTU32866NBE |
| 厂商： | Pericom |
| 文件页数： | 5/18页 |
| 文件大小： | 0K |
| 描述： | IC 25BIT CONFIG REG BUFF 96LFBGA |
| 产品变化通告： | Product Discontinuation Notice 22/Jan/2010 |
| 标准包装： | 285 |
| 逻辑类型： | 带奇偶位的可配置寄存缓冲器 |
| 位数： | 25 |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 96-LFBGA |
| 供应商设备封装： | 96-LFBGA（13.5x5.5） |
| 包装： | 托盘 |
13
PS8739B
11/21/05
PI74SSTU32866
25-bit 1:1 or 14-bit 1:2 Configurable
Registered Buffer with Parity
Parameter
Description
Test Conditions
VDD
Min.
Nom. Max.
Units
VOH
Output High Voltage
IOH = -6 mA
1.7V
1.2
V
VOL
Output Low Voltage
IOL = 6 mA
1.7V
0.5
II
All inputs
VI = VDD or GND
1.9V
±5
A
IDD
Static Stand-by
RST = GND
IO = 0
1.9V
100
Static Operating Current
RST = VDD, VI = VIH(AC) or VIL(AC)
1.9V
40
mA
IDDD
Dynamic Operating Cur-
rent - clock only
RST = VDD, VI = VIH(AC), or
VIL(AC) CK and CK switching 50%
duty cycle
IO = 0
1.8V
28
A/
MHz
Dynamic Operating - per
each data input, 1:1 mode
RST = VDD, VI = VIH(AC), or
VIL(AC), CK and CK switching 50%
duty cycle. One data input switch-
ing at half clock frequency, 50%
duty cycle
1.8V
36
A/
MHz
Dynamic Operating - per
each data input, 1:2 mode
RST = VDD, VI = VIH(AC), or
VIL(AC) CK and CK switching 50%
duty cycle. One data input switch-
ing at half clock frequency, 50%
duty cycle
1.8V
36
CI
Input capacitance, Data
and CSR inputs
VI = VREF ± 250mV
1.8V
2.5
3.5
pF
Input capacitance, CK
and CK
VICR = 0.9V, VID = 600mV
2
3
Input capacitance, RST
VI = VDD or GND
2.5
Electrical Characteristics (Over Recommended Operating Free Air Temperature range)
Timing Requirements Over Recommended Operating Free Air Temperature range (See Figure 1)
Parameter
Description
Min.
Max
Units
fclock
Clock frequency
270
MHz
tW
Pulse Duration, CK, CK, High or low
1
ns
tact
Differential inputs active time(14, 15)
10
tinact
Differential inputs inactive time(14, 15, 16)
15
tsu
Setup time
DCS before CK↑, CK↓, CSR high,
CSR before CK↑, CK↓, DCS high
0.7
DCS before CK↑, CK↓, CSR low
0.5
DODT, DCKE and data before CK↑, CK↓
0.5
PAR_IN before CK↑, CK↓
0.5
th
Hold Time
DCS, DODT, DCKE and data before CK↑, CK↓
0.5
PAR_IN after CK↑, CK↓
0.5
Notes: 14. This parameter is not necessarily production tested.
15. Data and VREF inputs must be a low minimum time of tact max, after RST is taken high.
16. Data and clock inputs must be held at valid levels (not floating) a minimum time of tinact max after RST is taken low.
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| PI74SSTU32866NBEX | 功能描述:寄存器 25B 1:1 or 14B 1:2 RoHS:否 制造商:NXP Semiconductors 逻辑类型:CMOS 逻辑系列:HC 电路数量:1 最大时钟频率:36 MHz 传播延迟时间: 高电平输出电流:- 7.8 mA 低电平输出电流:7.8 mA 电源电压-最大:6 V 最大工作温度:+ 125 C 封装 / 箱体:SOT-38 封装:Tube |
| PI74SSTV16857AE | 功能描述:寄存器 14Bit Lead Free Register Buffer RoHS:否 制造商:NXP Semiconductors 逻辑类型:CMOS 逻辑系列:HC 电路数量:1 最大时钟频率:36 MHz 传播延迟时间: 高电平输出电流:- 7.8 mA 低电平输出电流:7.8 mA 电源电压-最大:6 V 最大工作温度:+ 125 C 封装 / 箱体:SOT-38 封装:Tube |
| PI74SSTV16857AEX | 功能描述:寄存器 14Bit Lead Free Register Buffer RoHS:否 制造商:NXP Semiconductors 逻辑类型:CMOS 逻辑系列:HC 电路数量:1 最大时钟频率:36 MHz 传播延迟时间: 高电平输出电流:- 7.8 mA 低电平输出电流:7.8 mA 电源电压-最大:6 V 最大工作温度:+ 125 C 封装 / 箱体:SOT-38 封装:Tube |
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| PI74SSTV16859AE | 制造商:Pericom Semiconductor Corporation 功能描述:Registered Buffer Single 13-CH CMOS 64-Pin TSSOP Tube 制造商:Pericom Semiconductor Corporation 功能描述:13 to 26 Bit 2.3 to 2.7 V 2.8 ns Surface Mount Registered Buffer - TSSOP-64 |
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