PIC10F222-I/OT (Microchip) PDF资料下载 Datasheet(8/86 页)

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参数资料

型号：	PIC10F222-I/OT
厂商：	Microchip Technology
文件页数：	8/86页
文件大小：	0K
描述：	IC PIC MCU FLASH 512X12 SOT-23-6
标准包装：	3,000
系列：	PIC® 10F
核心处理器：	PIC
芯体尺寸：	8-位
速度：	8MHz
外围设备：	POR，WDT
输入/输出数：	4
程序存储器容量：	768B（512 x 12）
程序存储器类型：	闪存
RAM 容量：	23 x 8
电压 - 电源 (Vcc/Vdd)：	2 V ~ 5.5 V
数据转换器：	A/D 2x8b
振荡器型：	内部
工作温度：	-40°C ~ 85°C
封装/外壳：	SOT-23-6
包装：	散装

PIC10F220/222

DS41270E-page 14

2007 Microchip Technology Inc.

4.3

Data Memory Organization

Data memory is composed of registers or bytes of

RAM. Therefore, data memory for a device is specified

by its register file. The register file is divided into two

functional groups: Special Function Registers (SFR)

and General Purpose Registers (GPR).

The Special Function Registers include the TMR0 reg-

ister, the Program Counter (PCL), the STATUS register,

the I/O register (GPIO) and the File Select Register

(FSR). In addition, Special Function Registers are used

to control the I/O port configuration and prescaler

options.

The General Purpose Registers are used for data and

control information under command of the instructions.

For the PIC10F220, the register file is composed of 9

Special Function Registers and 16 General Purpose

Registers (Figure 4-3, Figure 4-4).

For the PIC10F222, the register file is composed of 9

Special Function Registers and 23 General Purpose

Registers (Figure 4-4).

4.3.1

GENERAL PURPOSE REGISTER

FILE

The General Purpose Register file is accessed, either

directly or indirectly, through the File Select Register

(FSR). See Section 4.9 “Indirect Data Addressing;

INDF and FSR Registers”.

FIGURE 4-3:

PIC10F220 REGISTER

FILE MAP

FIGURE 4-4:

PIC10F222 REGISTER

FILE MAP

4.3.2

SPECIAL FUNCTION REGISTERS

The Special Function Registers (SFRs) are registers

used by the CPU and peripheral functions to control the

operation of the device (Table 4-1).

The Special Function Registers can be classified into

two sets. The Special Function Registers associated

with the “core” functions are described in this section.

Those related to the operation of the peripheral

features are described in the section for each

peripheral feature.

File Address

00h

01h

02h

03h

04h

05h

06h

07h

10h

INDF(1)

TMR0

PCL

STATUS

FSR

OSCCAL

GPIO

General

Purpose

Registers

Note 1:

Not a physical register. See Section 4.9

“Indirect Data Addressing; INDF and

FSR Registers”.

Unimplemented, read as 00h.

08h

ADCON0

0Fh

1Fh

Unimplemented(2)

ADRES

09h