参数资料
型号: PIC16F676-E/P
厂商: Microchip Technology
文件页数: 95/132页
文件大小: 0K
描述: IC MCU FLASH 1KX14 W/AD 14DIP
产品培训模块: Asynchronous Stimulus
标准包装: 30
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
外围设备: 欠压检测/复位,POR,WDT
输入/输出数: 12
程序存储器容量: 1.75KB(1K x 14)
程序存储器类型: 闪存
EEPROM 大小: 128 x 8
RAM 容量: 64 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 125°C
封装/外壳: 14-DIP(0.300",7.62mm)
包装: 管件
配用: DM163029-ND - BOARD PICDEM FOR MECHATRONICS
2010 Microchip Technology Inc.
DS40039F-page 65
PIC16F630/676
9.4
Interrupts
The PIC16F630/676 has 7 sources of interrupt:
External Interrupt RA2/INT
TMR0 Overflow Interrupt
PORTA Change Interrupts
Comparator Interrupt
A/D Interrupt (PIC16F676 only)
TMR1 Overflow Interrupt
EEPROM Data Write Interrupt
The Interrupt Control register (INTCON) and Peripheral
Interrupt register (PIR) record individual interrupt
requests in flag bits. The INTCON register also has
individual and Global Interrupt Enable bits.
A Global Interrupt Enable bit, GIE (INTCON<7>)
enables (if set) all unmasked interrupts, or disables (if
cleared) all interrupts. Individual interrupts can be
disabled through their corresponding enable bits in
INTCON register and PIE register. GIE is cleared on
Reset.
The return from interrupt instruction, RETFIE, exits
interrupt routine, as well as sets the GIE bit, which re-
enables unmasked interrupts.
The following interrupt flags are contained in the
INTCON register:
INT pin interrupt
PORTA change interrupt
TMR0 overflow interrupt
The peripheral interrupt flags are contained in the
special register PIR1. The corresponding interrupt
enable bit is contained in Special Register PIE1.
The following interrupt flags are contained in the PIR
register:
EEPROM data write interrupt
A/D interrupt
Comparator interrupt
Timer1 overflow interrupt
When an interrupt is serviced:
The GIE is cleared to disable any further interrupt
The return address is pushed onto the stack
The PC is loaded with 0004h
Once in the Interrupt Service Routine, the source(s) of
the interrupt can be determined by polling the interrupt
flag bits. The interrupt flag bit(s) must be cleared in soft-
ware before re-enabling interrupts to avoid RA2/INT
recursive interrupts.
For external interrupt events, such as the INT pin, or
PORTA change interrupt, the interrupt latency will be
three or four instruction cycles. The exact latency
depends upon when the interrupt event occurs (see
Figure 9-11). The latency is the same for one or two-
cycle instructions. Once in the Interrupt Service
Routine, the source(s) of the interrupt can be
determined by polling the interrupt flag bits. The
interrupt flag bit(s) must be cleared in software before
re-enabling interrupts to avoid multiple interrupt
requests.
Note 1: Individual interrupt flag bits are set,
regardless
of
the
status
of
their
corresponding mask bit or the GIE bit.
2: When an instruction that clears the GIE
bit is executed, any interrupts that were
pending for execution in the next cycle
are ignored. The interrupts which were
ignored are still pending to be serviced
when the GIE bit is set again.
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PIC16F676-I/P 制造商:Microchip Technology Inc 功能描述:IC 8BIT FLASH MCU 16F676 DIP14
PIC16F676-I/SL 功能描述:8位微控制器 -MCU 1.75KB 64 RAM 12 I/O Ind Temp SOIC14 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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