STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
ii
9.12
Receive Jitter Attenuator (RJAT)................................................. 51
9.13
Signaling Extractor (SIGX) .......................................................... 51
9.14
Receive Per-channel Serial Controller (RPSC)........................... 52
9.15
T1 Signaling Aligner (SIGA)......................................................... 52
9.16
T1 Basic Transmitter (XBAS) ...................................................... 52
9.17
E1 Transmitter (E1-TRAN).......................................................... 53
9.18
Transmit Elastic Store (TX-ELST) ............................................... 53
9.19
Transmit Per-Channel Serial Controller (TPSC).......................... 54
9.20
T1 Inband Loopback Code Generator (XIBC)............................. 54
9.21
T1 Bit Oriented Code Generator (XBOC).................................... 55
9.22
HDLC Transmitters...................................................................... 55
9.23
T1 Automatic Performance Report Generation........................... 56
9.24
Pulse Density Enforcer (XPDE)................................................... 57
9.25
Pseudo Random Pattern Generation and Detection................... 57
9.26
Transmit Jitter Attenuator (TJAT)................................................. 57
9.27
Timing Options (TOPS)............................................................... 62
9.28
Line Transmitter........................................................................... 62
9.29
Backplane Receive Interface (BRIF)........................................... 63
9.30
Backplane Transmit Interface (BTIF)........................................... 64
9.31
JTAG Test Access Port................................................................ 65
9.32
Microprocessor Interface (MPIF)................................................. 65
10
REGISTER DESCRIPTION................................................................... 66
10.1
Normal Mode Register Memory Map........................................... 66
11
NORMAL MODE REGISTER DESCRIPTION ....................................... 75