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STANDARD PRODUCT
PM4351 COMET
DATA SHEET
PMC-1970624
ISSUE 10
COMBINED E1/T1 TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL
25
Pin No.
Pin Name
Type
-RI
-NI
Function
TCLKO
Output
5
C1
Transmit Clock Output (TCLKO). TCLKO is a clock at the transmit line rate
and may be used by external circuits as a transmit clock reference. When the
digital transmit line interface is enabled, TDAT and TFP are updated on the
either the rising or falling (default) edge of TCLKO.
RSYNC
Output
55
C9
Recovered Clock Synchronization Signal (RSYNC). This output signal is the
dejittered recovered receiver line rate clock (1.544 or 2.048 MHz) or, optionally,
the recovered clock synchronously divided by 193 (T1 mode) or 256 (E1 mode)
to create a 8 kHz timing reference signal. When 8 kHz, the RSYNC phase is
independent of frame alignment and is not affected by framing events.
When the COMET is in a loss of signal state, RSYNC is derived from the
XCLK input or, optionally, is held high.
TCLKI
Input
4
B1
Transmit Clock Reference (TCLKI). TCLKI may be used as a reference for the
transmit line rate generation. TCLKI may be any multiple of 8 kHz (N x 8 kHz,
where 1
≤
N
≤
256) so long as TCLKI has minimal jitter when divided down to
8 kHz. When the TCLKI frequency differs from the transmit line rate, the
transmit jitter attenuation block (TJAT) must be enabled to attenuate jitter on
the transmit clock in accordance with AT&T TR-62411 and ETS 300 011. When
the TCLKI frequency is the same as the transmit line rate, TCLKI is optionally
jitter attenuated by the TJAT in accordance with AT&T TR-62411 and ETS 300
011. When TCLKI jitter attenuation is enabled, the TCLKI frequency should be
programmed into the TJAT Jitter Attenuation Divider N1 Control register.
The COMET may be configured to ignore the TCLKI input and utilize BTCLK or
the receive recovered clock instead.
XCLK /
VCLK
Input
3
C3
Crystal Clock Input (XCLK). This signal provides a stable, global timing
reference for the COMET internal circuitry via an internal clock synthesizer.
XCLK is a nominally jitter-free 50% duty cycle clock at 1.544 MHz in T1 mode
and 2.048 MHz in E1 mode.
In T1 mode, a 2.048 MHz clock may be used as a reference. When used in
this way, however, the intrinsic jitter specifications to AT&T TR62411 may not
be met.
Vector Clock (VCLK). The VCLK signal is used during COMET production test
to verify internal functionality.
Table 6
- Analog Support Circuitry (4 pins)
Pin No.
Pin Name
Type
-RI
-NI
Function
ATB
Analog
I/O
68
B6
Analog Test Bus (ATB). Reserved for COMET production test. This pin must
be connected to an analog ground for normal operation.