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| 型号： | PM4541 |
| 厂商： | PMC-Sierra, Inc. |
| 英文描述： | T1XC EVALUATION DAUGHTER BOARD |
| 中文描述： | T1XC评价子板 |
| 文件页数： | 4/46页 |
| 文件大小： | 520K |
| 代理商： | PM4541 |
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TELECOM STANDARD PRODUCT
PMC-Sierra, Inc.
PM4541 T1XC-EVBD
PMC-920314
ISSUE 2
T1XC EVALUATION DAUGHTERBOARD
1
1 OVERVIEW
The PM4541 T1XC EVBD evaluation daughterboard allows for the test, evaluation,
and demonstration of the PMC PM4341 T1XC device. It is also compatible with the
PM6341 E1XC device. This daughterboard can be used standalone with up to two
T1XC devices but has been especially designed to mate with the PMC PM1501
EVMB evaluation motherboard to form a complete evaluation system. All required
decoding logic is provided on the T1XC EVBD daughterboard to give the EVMB
direct access to all registers of both T1XC devices.
All of the principal connections to both devices have been brought out to header
strips for convenient test access. DS-1 digital interfaces are provided on a header
strip and BNC or mini-bantam connectors are provided for DSX-1 analog signals.
The backplane interfaces of each device are accessible through header strips and
the devices can be interconnected back to back, effectively creating a jitter-
attenuating format converter (a function often implemented within a CSU) by
dropping in shorting connectors into specific DIP sockets. Special considerations
have been taken to ensure that the E1XC device will plug into one or both of the
T1XC sockets.
Clocks for the backplane are provided by a T1/CEPT digital trunk DPLL which
provides a synchronized 1.544 MHz, 2.048 MHz, or 4.096 MHz signal. The PLL can
be easily bypassed to allow direct drive of the backplane with an appropriate
oscillator. A prototype area has been provided for breadboarding more complex
applications.
The T1XC EVBD evaluation daughterboard is configured, monitored, and powered
through an edge connector that is designed to mate with the EVMB evaluation
motherboard
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