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参数资料
| 型号： | PM6670STR |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 稳压器 |
| 英文描述： | 3 A SWITCHING CONTROLLER, QCC24 |
| 封装： | 4 X 4 MM, LEAD FREE, VFQFPN-24 |
| 文件页数： | 18/54页 |
| 文件大小： | 742K |
| 代理商： | PM6670STR |
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PM6670S
Device description
Doc ID 14432 Rev 4
25/54
The design of the external feedback network depends on the output voltage ripple. If the
ripple is higher than approximately 20 mV, the correct CINT capacitor is usually enough to
keep the loop stable. The stability of the system depends firstly on the output capacitor zero
frequency.
The following condition must be satisfied:
Equation 6
where k is a fixed design parameter (k > 3). It determines the minimum integrator capacitor
value:
Equation 7
where gm = 50
μs is the integrator trans conductance.
In order to ensure stability it must be also verified that:
Equation 8
If the ripple on the COMP pin is greater than the integrator 150 mV, the auxiliary capacitor
CFILT can be added. If q is the desired attenuation factor of the output ripple, CFILT is given
by:
Equation 9
In order to reduce the noise on the COMP pin, it is possible to add a resistor RINT that,
together with CINT and CFILT, becomes a low pass filter. The cutoff frequency fCUT must be
much greater (10 or more times) than the switching frequency:
Equation 10
If the ripple is very small (lower than approximately 20 mV), a different compensation
network, called “Virtual-ESR” network, is needed. This additional circuit generates a
triangular ripple that is added to the output voltage ripple at the input of the integrator. The
complete control scheme is shown in Figure 32.
ESR
C
2
k
f
k
f
out
Zout
SW
π
=
>
Vout
Vr
f
k
f
2
g
C
Zout
SW
m
INT
π
>
OUT
Zout
m
INT
V
Vr
f
2
g
C
π
>
q
)
q
1
(
C
INT
FILT
=
FILT
INT
FILT
INT
CUT
INT
C
f
2
1
R
+
π
=
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