参数资料
型号: PM7351-BI
厂商: PMC-SIERRA INC
元件分类: 数字传输电路
英文描述: OCTAL SERIAL LINK MULTIPLEXER
中文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PBGA304
封装: 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304
文件页数: 165/174页
文件大小: 1790K
代理商: PM7351-BI
RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
155
Fig. 15 Microprocessor Interface Write Timing
tH
DW
Valid Data
D[7:0]
tV
WR
tS
AW
tH
AW
tS
DW
(CSB+WRB)
A[8:0]
Valid Address
ALE
tV
L
tS
ALW
tS
LW
tH
ALW
tH
LW
Notes on Microprocessor Interface Write Timing:
1
A valid write cycle is defined as a logical OR of the CSB and the WRB signals.
2
In non-multiplexed address/data bus architectures, ALE should be held high so
parameters tS
ALW
, tH
ALW
, tV
L
, and tS
LW
are not applicable.
3
Parameter tH
AW
is not applicable if address latching is used.
4
When a set-up time is specified between an input and a clock, the set-up time is
the time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point
of the clock.
5
When a hold time is specified between an input and a clock, the hold time is the
time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of
the clock.
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