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| 型号： | PPC440GR-3BB533CZ |
| 厂商： | APPLIEDMICRO INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 533 MHz, RISC PROCESSOR, PBGA456 |
| 封装： | 35 X 35 MM, PLASTIC, BGA-456 |
| 文件页数： | 49/88页 |
| 文件大小： | 1177K |
| 代理商： | PPC440GR-3BB533CZ |
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AMCC Proprietary
53
440GR – PPC440GR Embedded Processor
Preliminary Data Sheet
Revision 1.19 – May 07, 2008
Table 9. Signal Functional Description (Sheet 1 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω to 3.3V)
3. Must pull down (recommended value is 1k
Ω)
4. If not used, must pull up (recommended value is 3k
Ω to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
PCI Interface
PCIAD00:31
Address/Data bus (bidirectional).
I/O
3.3V PCI
PCIC0:3/BE0:3
PCI Command/Byte Enables
.
I/O
3.3V PCI
PCIClk
Provides timing to the PCI interface for PCI transactions.
I
3.3V PCI
5
PCIDevSel
Indicates the driving device has decoded its address as the
target of the current access.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
PCIFrame
Driven by the current master to indicate beginning and
duration of an access.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
PCIGnt1/Req
Indicates that the specified agent is granted access to the bus.
When the internal arbiter is enabled, output is PCIGnt0. When
the internal arbiter is disabled, output is Req.
O
3.3V PCI
PCIGnt2:6
Indicates that the specified agent is granted access to the bus.
O
3.3V PCI
PCIIDSel
Used as a chip select during configuration read and write
transactions.
I
3.3V PCI
PCIINT
Level sensitive PCI interrupt.
O
3.3V PCI
PCIIRDY
Indicates initiating agent’s ability to complete the current data
phase of the transaction.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
PCIPar
Even parity.
I/O
3.3V PCI
PCIPErr
Reports data parity errors during all PCI transactions except a
Special Cycle.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
PCIReq0/Gnt
Indicates to the PCI arbiter that the specified agent wishes to
use the bus. When the internal arbiter is enabled, input is
PCIReq0. When internal arbiter is disabled, input is Gnt.
I
3.3V PCI
4
PCIReq1:5
An indication to the PCI arbiter that the specified agent wishes
to use the bus.
I
3.3V PCI
4
PCIReset
Brings PCI device registers and logic to a consistent state.
O
3.3V PCI
PCISErr
Reports address parity errors, data parity errors on the Special
Cycle command, or other catastrophic system errors.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
PCIStop
Indicates the current target is requesting the master to stop the
current transaction.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
PCITRDY
Indicates the target agent’s ability to complete the current data
phase of the transaction.
(PCI 2.2 specification requires 8.2k
Ω pull up on host system)
I/O
3.3V PCI
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