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参数资料
| 型号： | PSD913F1V-12B81I |
| 厂商： | 意法半导体 |
| 英文描述： | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| 中文描述： | Flash在系统可编程ISP的外设的8位微控制器 |
| 文件页数： | 13/94页 |
| 文件大小： | 476K |
| 代理商： | PSD913F1V-12B81I |
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PSD9XX Family
Preliminary Information
16
9.1.1.1 Memory Block Selects
The decode PLD in the PSD9XX generates the chip selects for all the internal memory
blocks (refer to the PLD section). Each of the eight Flash memory sectors have a
Flash Select signal (FS0-FS7) which can contain up to three product terms. Each of the
four secondary Flash memory sectors have a Select signal (CSBOOT0-3) which can
contain up to three product terms. Having three product terms for each sector select signal
allows a given sector to be mapped in different areas of system memory. When using a
microcontroller with separate Program and Data space, these flexible select signals allow
dynamic re-mapping of sectors from one space to the other when used with the VM
Register (see section 9.1.3.1).
9.1.1.2 The Ready/Busy Pin (PC3)
Pin PC3 can be used to output the Ready/Busy status of the PSD9XX. The output on the
pin will be a ‘0’ (Busy) when Flash memory blocks are being written to, or when the Flash
memory block is being erased. The output will be a ‘1’ (Ready) when no write or erase
operation is in progress.
9.1.1.3 Memory Operation
The main Flash and secondary Flash memories are addressed through the microcontroller
interface on the PSD9XX device. The microcontroller can access these memories in one of
two ways:
t The microcontroller can execute a typical bus write or read operation just as it would
if accessing a RAM or ROM device using standard bus cycles.
t The microcontroller can execute a specific instruction that consists of several write
and read operations. This involves writing specific data patterns to special addresses
within the Flash to invoke an embedded algorithm. These instructions are summarized
in Table 9.
Typically, Flash memory can be read by the microcontroller using read operations, just
as it would read a ROM device. However, Flash memory can only be erased and
programmed with specific instructions. For example, the microcontroller cannot write a
single byte directly to Flash memory as one would write a byte to RAM. To program a byte
into Flash memory, the microcontroller must execute a program instruction sequence, then
test the status of the programming event. This status test is achieved by a read operation
or polling the Rdy/Busy pin (PC3).
The Flash memory can also be read by using special instructions to retrieve particular
Flash device information (sector protect status and ID).
The
PSD9XX
Functional
Blocks
(cont.)
相关PDF资料 |
PDF描述 |
|---|---|
| PSD913F1V-12J | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12JI | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12M | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD933212JIT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD933212JT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD913F1V-12J | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12JI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12M | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12MI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12U | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
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