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参数资料
| 型号： | PSD913F1V-12B81I |
| 厂商： | 意法半导体 |
| 英文描述： | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| 中文描述： | Flash在系统可编程ISP的外设的8位微控制器 |
| 文件页数： | 58/94页 |
| 文件大小： | 476K |
| 代理商： | PSD913F1V-12B81I |
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Preliminary Information
PSD9XX Family
57
Bit 1 0 = Automatic Power Down (APD) is disabled.
1 = Automatic Power Down (APD) is enabled.
Bit 3 0 = PLD Turbo is on.
1 = PLD Turbo is off, saving power.
Bit 4 0 = CLKIN input to the PLD AND array is connected.
Every CLKIN change will power up the PLD when Turbo bit is off.
1 = CLKIN input to PLD AND array is disconnected, saving power.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
**
*
PLD
*
APD
*
Array clk
Turbo
Enable
1 = off
1 = on
Table 31. Power Management Mode Registers (PMMR0, PMMR2)**
PMMR0
***Bits 0, 2, 6, and 7 are not used, and should be set to 0, bit 5 should be set to 1.
***The PMMR0, and PMMR2 register bits are cleared to zero following power up.
***Subsequent reset pulses will not clear the registers.
The
PSD9XX
Functional
Blocks
(cont.)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
*
PLD
**
PLD
**
PLD
**
array
DBE
ALE
CNTL2
CNTL1
CNTL0
1 = off
PMMR2
Bit 2 0 = Cntl0 input to the PLD AND array is connected.
1 = Cntl0 input to PLD AND array is disconnected, saving power.
Bit 3 0 = Cntl1 input to the PLD AND array is connected.
1 = Cntl1 input to PLD AND array is disconnected, saving power.
Bit 4 0 = Cntl2 input to the PLD AND array is connected.
1 = Cntl2 input to PLD AND array is disconnected, saving power.
Bit 5 0 = ALE input to the PLD AND array is connected.
1 = ALE input to PLD AND array is disconnected, saving power.
Bit 6 0 = DBE input to the PLD AND array is connected.
1 = DBE input to PLD AND array is disconnected, saving power.
**Unused bits should be set to 0.
**Refer to Table 17 the signals that are blocked on pins CNTL0-2.
相关PDF资料 |
PDF描述 |
|---|---|
| PSD913F1V-12J | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12JI | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12M | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD933212JIT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD933212JT | Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD913F1V-12J | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12JI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12M | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12MI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913F1V-12U | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
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