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| 型号： | PWL6030B1AACMR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187 |
| 文件页数： | 32/97页 |
| 文件大小： | 937K |
| 代理商： | PWL6030B1AACMR |
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SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
Each SMPS is a synchronous step-down converter operating with a 6-MHz, fixed-frequency PWM at
moderate-to-heavy load currents. At light load currents, the converter operates in power-save mode with PFM.
The converter uses a unique frequency locked-ring oscillating modulator to achieve best-in-class load and line
response and allows the use of tiny inductors and small ceramic input and output capacitors. At the beginning of
each switching cycle, the P-channel MOSFET switch is turned on and the inductor current ramps up, raising the
output voltage until the main comparator trips. The control logic then turns off the switch.
When a SMPS is not used, the SMPS input and ground must still be provided (SMPS_IN at VBAT level). The
switching node SMPS_SW can be left unconnected, but SMPS_GND and SMPS_FDBK must be tied to ground.
One key advantage of the nonlinear architecture is the absence of a traditional feedback loop. The loop response
to change in VO is essentially instantaneous, which explains its extraordinary transient response. The absence of
a traditional, high-gain compensated linear loop means that the regulator is inherently stable over a wide range of
L and CO. Each SMPS integrates two current limits, one in the P-channel MOSFET and another in the
N-channel MOSFET. When the current in the P-channel MOSFET reaches its current limit, the P-channel
MOSFET is turned off and the N-channel MOSFET is turned on for at least 150 ns.
With decreasing load current, the device automatically switches into pulse-skipping operation in which the power
stage operates intermittently based on load demand. By running cycles periodically, the switching losses are
minimized, and the device runs with a minimum quiescent current and maintaining high efficiency. The converter
will position the DC output voltage approximately 1 percent above the nominal output voltage. This
voltage-positioning feature minimizes voltage drops caused by a sudden load step. When in PFM mode, the
converter resumes its operation when the output voltage trips below the nominal voltage. It ramps up the output
voltage with a minimum of three pulses and goes into PFM mode when the inductor current return to a zero
steady state. Because of the dynamic voltage positioning, in PFM mode the average output voltage is slightly
higher than its nominal value in PWM mode. During PFM operation, the converter operates only when the output
voltage trips below a set threshold voltage. It ramps up the output voltage with several pulses and goes into PFM
mode when the output voltage exceeds the nominal output voltage.
For each SMPS, all output voltages can be selected, regardless the external devices connected to them. There is
no hardware protection to prevent software from selecting an improper output voltage that would damage the
related external equipments. The output voltage codes are described by the following equation.
Nominal voltage value = (0.6077 V + OFFSET_RW
× SMPS_OFFSET bit × 0.1013V + 0.01266 V × (binary value –
00000001))
× (MULT_RW × SMPS_MULT bit × 43/21 + 1)
(1)
An extended output voltage selection mode as well as an offset application can be enabled through EPROM.
The extended output voltage codes with and without offset application are presented in Table 7 and in the
SMPS_MULT and SMPS_OFFSET registers.
The slew rate of voltage changes is controlled using a step register. For non-SmartReflex supplies, the voltage
register is used for voltage selection (for supplies having programmable output voltages). A SmartReflex
command does not change the group state.
NOTE
The OFFSET_RW and SMPS_OFFSET bit are part of the SMPS_OFFSET register.
The MULT_RW and SMPS_MULT bit are part of the SMPS_MULT register.
Binary code stands for the SMPS VSEL[5:0] bits.
This formula applies to all SMPSs, instantiating the same IP, for all codes from 000001
to 111001.
For the remaining codes, it is specified dedicated discrete output voltages:
– 000000 sets the output voltage to 0 V.
– 111010 to 111110 set the output voltages in the range of 1.35 – 2.1 V.
– 111111 code is reserved and must not be used.
Table 5 lists the SMPS output voltage selection code in standard mode without offset.
38
Copyright
2010–2011, Texas Instruments Incorporated
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