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| 型号： | PWL6030B1AACMR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PBGA187 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, GREEN, FCBGA-187 |
| 文件页数： | 79/97页 |
| 文件大小： | 937K |
| 代理商： | PWL6030B1AACMR |
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SWCS045-021
+
–
V PWL
VAUX3
VAUX3_IN
(from the battery)
SWCS045B
– SEPTEMBER 2010 – REVISED JUNE 2011
VIBRATOR DRIVER AND PWM SIGNALS
Vibrator
Instead of using the VAUX3 LDO for a generic voltage supply, it can be used as a vibrator motor driver. The
output voltage of this regulator is programmable, based on a nominal 4-Hz cycle. A 16-Hz input clock is received
from the clock generator (32.768-kHz crystal clock resynchronized on the RC 6-MHz clock). The output voltage
level is through registers and the LDO can provide up to 200 mA.
The duty cycle of the nominal 4-Hz frequency is controlled through register and can be 25%, 50%, 75%, and
100%. This vibrator driver allows a soft turn on (500
s maximum) and turn off (2 ms maximum).
Figure 22 shows a block diagram of the vibrator motor driver.
Figure 22. Block Diagram of Vibrator Motor Driver
PWMs
The PWM1 and PWM2 digital outputs provide PWM signals on the 1.8-V I/O domain. Those outputs can be
active also when the system is in SLEEP state. The current drive capability of each PWM buffer is 4 mA.
Each of the PWMx ON/OFF positions is determined by the register values (PWMxON, PWMxOFF) within the
range 0
–127 or 0–63.
The number of clock cycles in a PWM period has two available values:
64 clock cycles
128 clock cycles
This is controlled with the PWMx_LENGTH bit in the PWMxON register.
The clock is received only when the control bit PWMxEN is set in the TOGGLE3 register. This clock enable is
necessary for current saving when PWM is not used.
To get a clean OFF state (with reset on registers when PWM is disabled), first the PWMxR bit must be set and
then the clock can be disabled with PWMxEN.
80
Copyright
2010–2011, Texas Instruments Incorporated
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