参数资料
型号: QL8150-6PQN208I
厂商: QUICKLOGIC CORP
元件分类: FPGA
英文描述: FPGA, 640 CLBS, 188946 GATES, PQFP208
封装: LEAD FREE, PLASTIC, QFP-208
文件页数: 1/96页
文件大小: 1607K
代理商: QL8150-6PQN208I
2007 QuickLogic Corporation
1
Device Highlights
Flexible Programmable Logic
As low as 14 A standby current
0.18 m, six layer metal CMOS process
1.8 V VCC, 1.8/2.5/3.3 V drive capable I/O
Up to 4,002 dedicated flip-flops
Up to 55.3 K embedded SRAM bits
Up to 310 I/O
Up to 335 user available pins
Up to 320 K system gates
IEEE 1149.1 boundary scan testing compliant
Embedded Dual Port SRAM
Up to twenty-four 2,304 bit dual port high
performance SRAM blocks
RAM/ROM/FIFO wizard for automatic
configuration
Configurable and cascadable aspect ratio
Programmable I/O
High performance I/O cell
Programmable slew rate control
Programmable I/O standards:
LVTTL, LVCMOS, LVCMOS18, PCI, GTL+,
SSTL2, and SSTL3
Independent I/O banks capable of supporting
multiple standards in one device
I/O register configurations: Input, Output,
Output Enable (OE)
Advanced Clock Network
Multiple dedicated low skew clock networks
High drive input-only networks
Quadrant-based segmentable clock networks
User programmable Phase Locked Loops (PLL)
Embedded Computational Units
(ECUs)
Hardwired DSP building blocks with integrated
Multiply, Add, and Accumulate functions.
Security Features
The QuickLogic products come with secure
ViaLink
technology that protects intellectual
property from design theft and reverse engineering.
No external configuration memory needed;
instant-on at power-up.
Figure 1: Eclipse II Block Diagram
Embedded RAM Blocks
PLL
Fabric
Embeded Computational Units
Embedded RAM Blocks
PLL
Ultra-Low Power FPGA Combining Performance, Density, and
Embedded RAM
Eclipse II Family Data Sheet
相关PDF资料
PDF描述
QL8150-7PQN208C FPGA, 640 CLBS, 188946 GATES, PQFP208
QL8150-7PQN208I FPGA, 640 CLBS, 188946 GATES, PQFP208
QL8150-7PQN208M FPGA, 640 CLBS, 188946 GATES, PQFP208
QL8150-8PQN208C FPGA, 640 CLBS, 188946 GATES, PQFP208
QL8150-8PQN208I FPGA, 640 CLBS, 188946 GATES, PQFP208
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