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参数资料
| 型号： | R5F2L3ACCNFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件页数： | 46/74页 |
| 文件大小： | 959K |
| 代理商： | R5F2L3ACCNFP |
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51
2588F–AVR–06/2013
ATtiny261/461/861
0x0003
rjmp
TIM1_COMPA
; Timer1 CompareA Handler
0x0004
rjmp
TIM1_COMPB
; Timer1 CompareB Handler
0x0005
rjmp
TIM1_OVF
; Timer1 Overflow Handler
0x0006
rjmp
TIM0_OVF
; Timer0 Overflow Handler
0x0007
rjmp
USI_START
; USI Start Handler
0x0008
rjmp
USI_OVF
; USI Overflow Handler
0x0009
rjmp
EE_RDY
; EEPROM Ready Handler
0x000A
rjmp
ANA_COMP
; Analog Comparator Handler
0x000B
rjmp
ADC
; ADC Conversion Handler
0x000C
rjmp
WDT
; WDT Interrupt Handler
0x000D
rjmp
EXT_INT1
; IRQ1 Handler
0x000E
rjmp
TIM0_COMPA
; Timer0 CompareA Handler
0x000F
rjmp
TIM0_COMPB
; Timer0 CompareB Handler
0x0010
rjmp
TIM0_CAPT
; Timer0 Capture Event Handler
0x0011
rjmp
TIM1_COMPD
; Timer1 CompareD Handler
0x0012
rjmp
FAULT_PROTECTION ; Timer1 Fault Protection
0x0013
RESET: ldi
r16, low(RAMEND) ; Main program start
0x0014
ldi
r17, high(RAMEND); Tiny861 have also SPH
0x0015
out
SPL, r16
; Set Stack Pointer to top of RAM
0x0016
out
SPH, r17
; Tiny861 have also SPH
0x0017
sei
; Enable interrupts
0x0018
<instr>
...
9.2
External Interrupts
The External Interrupts are triggered by the INT0 or INT1 pin or any of the PCINT15:0 pins.
Observe that, if enabled, the interrupts will trigger even if the INT0, INT1 or PCINT15:0 pins are
configured as outputs. This feature provides a way of generating a software interrupt. Pin
change interrupts PCI will trigger if any enabled PCINT15:0 pin toggles. The PCMSK Register
control which pins contribute to the pin change interrupts. Pin change interrupts on PCINT15:0
are detected asynchronously. This implies that these interrupts can be used for waking the part
also from sleep modes other than Idle mode.
The INT0 and INT1 interrupts can be triggered by a falling or rising edge or a low level. This is
set up as indicated in the specification for the MCU Control Register – MCUCR. When the INT0
interrupt is enabled and is configured as level triggered, the interrupt will trigger as long as the
pin is held low. Note that recognition of falling or rising edge interrupts on INT0 or INT1 requires
the presence of an I/O clock, described in “Clock Subsystems” on page 24.
9.2.1
Low Level Interrupt
A low level interrupt on INT0 is detected asynchronously. This means that the interrupt source
can be used for waking the part also from sleep modes other than Idle (the I/O clock is halted in
all sleep modes except Idle).
Note that if a level triggered interrupt is used for wake-up from Power-down, the required level
must be held long enough for the MCU to complete the wake-up to trigger the level interrupt. If
the level disappears before the end of the Start-up Time, the MCU will still wake up, but no inter-
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相关代理商/技术参数 |
参数描述 |
|---|---|
| R5F2L3ACCNFP#30 | 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 128KB FLASH 100LQFP |
| R5F2L3ACCNFP#U1 | 制造商:Renesas Electronics Corporation 功能描述: |
| R5F2L3ACCNFP#V0 | 功能描述:MCU 1KB FLASH 128K ROM 100-LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/Lx/3AC 标准包装:250 系列:80C 核心处理器:8051 芯体尺寸:8-位 速度:16MHz 连通性:EBI/EMI，I²C，UART/USART 外围设备:POR，PWM，WDT 输入/输出数:40 程序存储器容量:- 程序存储器类型:ROMless EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4.5 V ~ 5.5 V 数据转换器:A/D 8x10b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:68-LCC（J 形引线） 包装:带卷 (TR) |
| R5F2L3ACMDFA#U0 | 制造商:Renesas Electronics Corporation 功能描述:R8C/L3AM 128+4/10 100QFP 14X20 制造商:Renesas Electronics Corporation 功能描述:R8C/L3AM 128+4/10 100QFP 14X20 -40 TO +85 - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 128KB FLASH 100LQFP |
| R5F2L3ACMNFA#U0 | 制造商:Renesas Electronics Corporation 功能描述:R8C/L3AM 128+4/10 100QFP 14X20 制造商:Renesas Electronics Corporation 功能描述:R8C/L3AM 128+4/10 100QFP 14X20 -20 TO +85 - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 128KB FLASH 100LQFP 制造商:Renesas Electronics Corporation 功能描述:MCU,R8C,16bit,20MHz,128KB Flash,QFP100 |
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