
R01UH0218EJ0110 Rev.1.10
Page 159 of 664
Sep 12, 2011
R32C/142 Group and R32C/145 Group
10. Interrupts
10.6.6
IPL after Accepting an Interrupt Request
When a peripheral interrupt request is accepted, the interrupt request level is set in the IPL (processor
interrupt priority level).
Software interrupts and special interrupts have no interrupt request level. When these interrupt
requests are accepted, the value listed in Table 10.8 is set in the IPL as the interrupt request level.
10.6.7
Register Saving
In the interrupt sequence, the flag register (FLG) and program counter (PC) values are saved to the
stack, in that order.
Figure 10.8 shows the stack status before and after an interrupt request is
accepted.
In the fast interrupt sequence, the flag register and program counter values are saved to the save flag
register (SVF) and save PC register (SVP), respectively.
If there are any other registers to be saved to the stack, save them at the beginning of the interrupt
handler. A single PUSHM instruction saves all registers except the frame base register (FB) and stack
pointer (SP).
Figure 10.8 Stack Status Before and After an Interrupt Request is Accepted
Table 10.8
Interrupts without Interrupt Request Level and IPL
Interrupt Sources without Interrupt Request Level
IPL Value to be Set
NMI, watchdog timer, oscillator stop detection
7
Reset
0
Software
Unchanged
Stack status before interrupt request is accepted
Stack status after interrupt request is accepted
Contents of previous stack
m+1
m
m-1
m-2
m-3
m-4
m-5
m-6
m-7
m-8
SP
MSB
LSB
Stack
Address
Contents of previous stack
Flag register (FLGHH)
Flag register (FLGHL)
Flag register (FLGLH)
Flag register (FLGLL)
Program counter (PCHH)
Program counter (PCHL)
Program counter (PCLH)
Program counter (PCLL)
m+1
m
m-1
m-2
m-3
m-4
m-5
m-6
m-7
m-8
SP
MSB
LSB
Stack
Address