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参数资料
| 型号： | RPIXP2800BC |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 650 MHz, RISC PROCESSOR, PBGA1356 |
| 封装： | 37.50 X 37.50 MM, 1 MM PITCH, FCBGA-1356 |
| 文件页数： | 41/130页 |
| 文件大小： | 1782K |
| 代理商： | RPIXP2800BC |
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Intel IXP2800 and IXP2850 Network Processors
Functional Units
18
Datasheet
2.10
Serial Port
The network processor contains a standard RS-232 compatible Universal Asynchronous
Receiver/Transmitter (UART), which can be used for communication with a debugger or
maintenance console. Modem controls are not supported; if they are needed, GPIO pins can be
used for that purpose.
The UART performs serial-to-parallel conversion on data characters received from a peripheral
device and parallel-to-serial conversion on data characters received from the processor. The
processor can read the complete status of the UART at any time during operation. Available status
information includes the type and condition of the transfer operations being performed by the
UART and any error conditions (parity, overrun, framing, or break interrupt).
The serial ports can operate in either FIFO or non-FIFO mode. In FIFO mode, a 64-byte transmit
FIFO holds data from the processor to be transmitted on the serial link and a 64-byte receive FIFO
buffers data from the serial link, until the data is read by the processor.
The UART includes a programmable baud rate generator, which is capable of dividing the internal
clock input by divisors of 1 to 2
16 - 1 and produces a 16x clock that drives the internal transmitter
logic and the receive logic. The UART can be operated in polled or in interrupt-driven mode, as
selected by software.
2.11
Slowport
The Slowport is an external interface to the network processor, and is used for 8-bit flash ROM
access and 8, 16, or 32-bit microprocessor device access. It allows the Intel XScale
core to do
read/write data transfers to these slave devices. The Slowport supports 4-, 8-, and 16-Mbyte flash
sizes.
The address bus and data bus are multiplexed to reduce the pincount. In addition, 24 bits of address
are shifted out on three clock cycles. Therefore, an external set of buffers is needed to latch the
address; two chip selects are provided — see Figure 8 (note that the ACK signal is optional).
相关PDF资料 |
PDF描述 |
|---|---|
| RPIXP2850BB | 32-BIT, 1400 MHz, RISC PROCESSOR, PBGA1356 |
| RPM-075PTT86 | PHOTO TRANSISTOR DETECTOR |
| RS5C316B-E2 | 0 TIMER(S), REAL TIME CLOCK, PDSO8 |
| RS5C317B-E1 | 0 TIMER(S), REAL TIME CLOCK, PDSO14 |
| RS5C317B-E2 | 0 TIMER(S), REAL TIME CLOCK, PDSO14 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RPIXP2805ABR 880603 | 制造商:Intel 功能描述:CPU - Central Processing Units IXP2805 Network Proc 1GHz FCPGA2-1356 |
| RPIXP2805AC | 制造商:Intel 功能描述:DEVICE CON IXP2805AC 1.40G PBG |
| RPIXP2805AC S LA7E | 制造商:Intel 功能描述:DEVICE CON IXP2805AC 1.40G PBG |
| RPIXP2805AC-889961 | 制造商:Intel 功能描述:ITLRPIXP2805AC-889961 MM# 889961 / NETWO |
| RPIXP2805ACR S LA7D | 制造商:Intel 功能描述:DEVICE CON IXP2805ACR 1.40G PB |
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