Intel IXP2800 and IXP2850 Network
Processors
Datasheet
Product Features
The Intel
IXP2800 and IXP2850 Network Processors enable fast deployment
of complete content processing by providing unlimited programming flexibility,
code re-use, and high-performance processing. These network processors
support a wide variety of WAN and LAN applications that require support for a
broad range of speeds — currently ranging from OC-3 to OC-192.
High-performance and scalability are achieved through an innovative
Microengine architecture that includes a multi-threaded distribution cache
architecture that enables pipeline features in software.
In addition to the standard feature set available with the IXP2800, the IXP2850
integrates functionality for secure network traffic at 10 Gbits/s. This enables the
up-front design of secure network equipment and results in lower overall system
cost for power consumption, board real estate, and silicon investment.
Sixteen Integrated Microengines (Version 2)
— Operating frequency of up to 1.4 GHz
— Configurable to four or eight threads per
Microengine
— 640 Dwords of local memory per Microengine
— Sixteen-entry CAM per Microengine with
single-cycle lookup
— Next Neighbor bus accessing adjacent
Microengines
— CRC unit per Microengine
— 8K instructions control store per Microengine
— Support for Generalized Thread Signaling
Integrated Intel XScale Core
— Operating frequency of up to 700 MHz
— High Performance, low-power 32-bit
embedded RISC processor
— 32 Kbyte instruction cache
— 32 Kbyte data cache
Two Integrated Cryptographic Units
(IXP2850 only)
— Operating frequency of up to 700 MHz
— Support for DES, 3DES, AES, and SHA-1
algorithms
— Support for AES 128, 192, and 256 bit keys
Three industry standard RDRAM Interfaces
— Peak bandwidth of 2.1 Gbytes/s
— 800-MHz and 1066-MHz RDRAM
— Error Correction Code (ECC)
— Addressable from Intel XScale
core,
Microengines, and PCI
Four industry standard 32-bit QDR SRAM
Interfaces
— Peak bandwidth of 1.9 Gbytes/s per channel
— Up to 233-MHz SRAM
— Hardware support for Linked List and Ring
operations
— Atomic bit operations
— Atomic arithmetic support
— Addressable from Intel XScale
core,
Microengines, and PCI
Integrated Media Switch Fabric Interface
— Two unidirectional 16-bit Low-Voltage
Differential Signaling (LVDS) data interfaces
— Up to 500 MHz per channel
— Separately configurable for either SPI-4 or
CSIX protocols
Industry standard PCI Bus
— PCI Local Bus Specification, Version 2.2*
interface for 64-bit 66-MHz I/O
Additional integrated features
— Hardware Hash Unit (48, 64, and 128 bit)
— 16 KByte Scratchpad Memory
— Serial UART port for debugging
— Eight general-purpose I/O pins
— Four 32-bit timers
1356 Ball FCBGA package
— Dimensions of 37.5 mm x 37.5 mm
— 1 mm solder ball pitch
Order Number: 278537-017