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参数资料
| 型号： | RPIXP2850BB |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1400 MHz, RISC PROCESSOR, PBGA1356 |
| 封装： | 37.50 X 37.50 MM, 1 MM PITCH, FCBGA-1356 |
| 文件页数： | 39/130页 |
| 文件大小： | 1782K |
| 代理商： | RPIXP2850BB |
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Intel IXP2800 and IXP2850 Network Processors
Functional Units
16
Datasheet
The unit of information transferred between Traffic Managers and Switch Fabrics is called a
CFrame. There are three categories of CFrames:
Data
Control (one type of which is flow control)
Idle
The MSF automatically discards any Idle CFrames that it receives from the SF, and transmits Idle
CFrames to the SF when required. The MSF stores Data and Control CFrames in buffers during
transmit and receive operations. The buffers may be partitioned according to CFrame category —
guaranteeing that neither control nor data CFrames will block each other.
There are two types of CSIX-L1 flow control:
Link Level
Virtual Output Queue (VOQ)
Every CFrame Base Header contains a Ready Field, which contains two Link Level flow control
bits: one for Flow Control traffic and one for Data traffic. Due to the CSIX-L1 requirement for
bounded response to Link Level flow control, the MSF manages all Link Level flow control.
Virtual Output Queue Flow Control is carried in Flow Control CFrames. As with Data CFrames,
the MSF places Flow Control CFrames in internal buffers before passing them to the Microengines
for processing.
2.7.3
Flow Control Bus
The MSF Flow Control Bus passes CSIX-L1 flow control CFrames between two network
processors or between a Switch Fabric and a single network processor. The bus is implemented as
two independent unidirectional buses. It uses LVDS signaling with the same clocking rate as the
MSF receive and transmit channels, and has a 4-bit data bus — yielding an available bandwidth
equal to 25 percent of the receive and transmit channels.
The Flow Control Bus can be configured in one of two modes:
Dual Chip, Full Duplex Mode for applications where the Fabric Interface uses the transmit and
receive channels to pass flow control CFrames
Simplex Mode for applications where the Fabric Interface is designed to use the Flow Control
Bus to pass flow control CFrames
When the IXP2800/IXP2850 is configured in Dual Chip, Full Duplex Mode, the Egress
IXP2800/IXP2850 automatically forwards CFrames received from the Switch Fabric across the
Flow Control Bus to the Ingress IXP2800/IXP2850. Additionally, the Egress IXP2800/IXP2850
sends incoming and outgoing Link Level flow control information across the Flow Control Serial
Bus to the Ingress IXP2800/IXP2850.
When the IXP2800/IXP2850 is configured in Simplex Mode, the Flow Control Bus signals are
connected directly to the Switch Fabric. The Egress IXP2800/IXP2850 sends flow control
CFrames directly to the Switch Fabric, and the Switch Fabric sends flow control CFrames directly
to the Ingress IXP2800/IXP2850.
Figure 7 shows the IXP2800 connected in both modes.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RPIXP2855AA | 制造商:Intel 功能描述: |
| RPIXP2855AB SLA7V | 制造商:Intel 功能描述: |
| RPIXP2855ACR | 制造商:Intel 功能描述: |
| RPIXP2855AD S LA7S | 制造商:Intel 功能描述:DEVICE CON IXP2855AD 1.50G PBG |
| RPIXP2855AD 888562 | 制造商:Intel 功能描述:CPU - Central Processing Units IXP2855 Network Proc 1.5GHz FCPGA2-1356 |
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