Intel IXP2800 and IXP2850 Network Processors
Signal Description
Datasheet
37
3.2.5
Slowport Signals
The Slowport is used to interface to asynchronous devices. Typically this will be a Flash ROM
(Boot ROM) and maintenance port of MAC devices. Slowport signals use LVTTL signaling levels
PCI_ZQ1,
PCI_ZQ2
I/O
Impedance Match. The PCI_ZQ1 pin should be tied to VSS
through a 31.6-ohm resistor. Internal circuits match the
impedance of the output drivers to the value of this resistor
when the outputs are driving a high logic level.
Note: The nominal value for ZQ1 is 31.6 ohms, and the
resistor range is 30.1 to 34 ohms. The resistor tolerance
should be +/- 1%.
The PCI_ZQ2 pin should be connected to VCC3.3 through
a 28-ohm resistor. Internal circuits match the impedance of
the output drivers to the value of this resistor when the
outputs are driving a low logic level.
Note: The nominal value for ZQ2 is 28 ohms, and the
resistor range is 27.4 to 31.6 ohms. The resistor tolerance
should be +/- 1%.
2
Total
95
Table 9.
PCI Signals (Sheet 3 of 3)
Signal Name
I/O
Description
Number
Table 10. Slowport Signals
Signal Name
I/O
Description
Number
SP_CLK
O
Clock.
1
SP_WR_L
O
Write strobe.
1
SP_RD_L
O
Read strobe.
1
SP_AD(0)
SP_AD(1)
SP_AD(2)
SP_AD(3)
SP_AD(4)
SP_AD(5)
SP_AD(6)
SP_AD(7)
I/O
Multiplexed Address and Data.
8
SP_ACK_L
I
Acknowledge signal.
1
SP_CS_L(0),
SP_CS_L(1)
O
Device selects.
2
SP_ALE_L
O
Address latch enable.
1
SP_CP/SP_A0
O
Latch enable for 16 or 32-bit data bus devices. Address [0]
for 8-bit devices.
1
SP_OE_L
O
Output enable.
1
SP_DIR/SP_A1
O
Data transaction direction. Low for read, high for write.
Address [1] for 8-bit devices.
1
Total
18